STT-MRAM cell structures

• US 9,940,989 B2
• Filed: 01/31/2017
• Issued: 04/10/2018
• Est. Priority Date: 01/09/2009
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Liu, Jun, Sandhu, Gurtej
• Primary Examiner(s): Nguyen, Tuan T
• Application Number:
  US15/421,204
• Publication Number:
  US 20170140806A1
• Time in Patent Office: 434 Days
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: H01L 29/66007 Multistep manufacturing processes
• CPC Class Codes: H10N 50/01 Manufacture or treatment
• CPC Class Codes: H10N 50/10 Magnetoresistive devices
• CPC Class Codes: H10N 50/80 Constructional details

Abstract

A magnetic cell structure including a nonmagnetic bridge, and methods of fabricating the structure are provided. The magnetic cell structure includes a free layer, a pinned layer, and a nonmagnetic bridge electrically connecting the free layer and the pinned layer. The shape and/or configuration of the nonmagnetic bridge directs a programming current through the magnetic cell structure such that the cross sectional area of the programming current in the free layer of the structure is less than the cross section of the structure. The decrease in the cross sectional area of the programming current in the free layer enables a lower programming current to reach a critical switching current density in the free layer and switch the magnetization of the free layer, programming the magnetic cell.

Claims

1. A method of operating a memory cell comprising:

directing a programming current through a free layer in the memory cell such that a cross sectional area of the programming current through the free layer is smaller than the cross section of the memory cell; and

programming the memory cell.

2. The method, as set forth in claim 1, wherein the cross sectional area of the programming current through the free layer of the memory cell is smaller than the axial cross section of the free layer.

3. The method, as set forth in claim 1, wherein directing a programming current through the free layer comprises directing the programming current to flow laterally in the free layer, wherein a lateral cross section of the free layer is smaller than an axial cross section of the free layer.

4. The method, as set forth in claim 1, comprising:

directing the programming current to flow through a nonmagnetic bridge, wherein a cross section of the nonmagnetic bridge is smaller than a cross section of the memory cell.

5. The method, as set forth in claim 4, wherein the programming current is directed from a pinned layer in the memory cell, through the nonmagnetic bridge, and through the free layer.

6. The method, as set forth in claim 4, wherein the cross sectional area of the programming current through the free layer is approximately the cross section of the nonmagnetic bridge.

7. The method, as set forth in claim 4, wherein the nonmagnetic bridge is a nonmagnetic layer, a nonmagnetic spacer, or a nonmagnetic liner in the memory cell.

8. The method, as set forth in claim 1, wherein the memory cell is programmed when a density of the programming current through the free layer is high enough to switch a magnetization of the free layer to be either parallel or antiparallel to a magnetization of a pinned layer in the memory cell.

9. A method of operating a memory cell comprising:

directing a programming current through a magnetic cell structure comprising a pinned ferromagnetic layer, a free ferromagnetic layer and an intermediate layer formed therebetween, wherein the programming current is directed through the free ferromagnetic layer through a nonmagnetic bridge having a cross sectional area that is smaller than the cross section of the magnetic cell structure; and

programming the memory cell.

10. The method, as set forth in claim 9, wherein directing a programming current through the magnetic cell structure comprises directing the programming current through a magnetic tunnel junction (MJT).

11. The method, as set forth in claim 9, wherein directing a programming current through the magnetic cell structure comprises directing the programming current through a spin valve structure.

12. The method, as set forth in claim 9, wherein the nonmagnetic bridge is formed inside the intermediate layer.

13. The method, as set forth in claim 9, wherein the nonmagnetic bridge is surrounding the intermediate layer.

14. The method, as set forth in claim 9, wherein the nonmagnetic bridge comprises Cu, Au, Ta, Ag, CuPt, CuMn, or any combination thereof.

15. The method, as set forth in claim 9, wherein the nonmagnetic bridge comprises a conductive material.

16. A method of operating a memory cell comprising:

directing a programming current between a free layer of the memory cell and a pinned layer of the memory cell through a nonmagnetic bridge coupled to each of the free layer and the pinned layer, wherein a cross sectional area of the programming current through the nonmagnetic bridge is smaller than a cross sectional area of the free layer; and

programming the memory cell.

17. The method, as set forth in claim 16, wherein the programming current is directed from a pinned layer in the memory cell, through the nonmagnetic bridge, and through the free layer.

18. The method, as set forth in claim 16, wherein the cross sectional area of the programming current through the free layer is approximately the cross section of the nonmagnetic bridge.

19. The method, as set forth in claim 16, wherein the nonmagnetic bridge is a nonmagnetic layer, a nonmagnetic spacer, or a nonmagnetic liner in the memory cell.

20. The method, as set forth in claim 16, wherein the memory cell is programmed when a density of the programming current through the free layer is high enough to switch a magnetization of the free layer to be either parallel or antiparallel to a magnetization of a pinned layer in the memory cell.