Circuits for determining the resistive states of resistive change elements

• US 9,941,001 B2
• Filed: 06/07/2016
• Issued: 04/10/2018
• Est. Priority Date: 06/07/2016
• Status: Active Grant

• Current Assignee: Nantero Incorporated
• Original Assignee: Nantero Incorporated
• Inventors: Harvard, Qawi
• Primary Examiner(s): Le, Vu
• Application Number:
  US15/175,201
• Publication Number:
  US 20170352412A1
• Time in Patent Office: 672 Days
• Field of Search: 365207, 365206, 365205, 36518915, 36518906
• CPC Class Codes: G11C 13/0007 comprising metal oxide memory material, e.g. perovskites
• CPC Class Codes: G11C 13/0023 Address circuits or decoders
• CPC Class Codes: G11C 13/003 Cell access
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods
• CPC Class Codes: G11C 13/0061 Timing circuits or methods
• CPC Class Codes: G11C 13/0069 Writing or programming circuits or methods
• CPC Class Codes: G11C 13/0097 Erasing, e.g. resetting, circuits or methods
• CPC Class Codes: G11C 13/025 using fullerenes, e.g. C60, or nanotubes, e.g. carbon or silicon nanotubes
• CPC Class Codes: G11C 2013/0045 Read using current through the cell
• CPC Class Codes: G11C 2013/0078 Write using current through the cell
• CPC Class Codes: G11C 2213/71 Three dimensional array
• CPC Class Codes: G11C 2213/82 Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials
• CPC Class Codes: H10K 10/484 characterised by the channel regions

Abstract

Devices and methods for determining resistive states of resistive change elements in resistive change element arrays are disclosed. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can determine resistive states of resistive change elements by sensing current flow. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can determine resistive states of resistive change elements without the need for in situ selection devices or other current controlling devices. According to some aspects of the present disclosure the devices and methods for determining resistive states of resistive change elements can reduce the impact of sneak current when determining resistive states of resistive change elements.

Claims

1. A circuit for determining a resistive state of a resistive change element, said circuit comprising:

a current source having an output terminal, wherein said current source is configured to supply a set amount of current to said output terminal, and wherein said set amount of current is the same amount for different resistive states of a resistive change element; and

a sense circuit, wherein said sense circuit comprises;

a field effect transistor dimensioned for determining a resistive state of a resistive change element, said field effect transistor having a gate terminal, a source terminal, and a drain terminal, wherein said drain terminal of said field effect transistor is electrically connected to said output terminal of said current source; and

a differential amplifier having a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein said inverting input terminal is electrically connected to said source terminal of said field effect transistor, and wherein said output terminal is electrically connected to said gate terminal of said field effect transistor.

2. The circuit of claim 1, wherein said field effect transistor is a metal oxide semiconductor field effect transistor.

3. The circuit of claim 2, wherein said metal oxide semiconductor field effect transistor is a n-channel metal oxide semiconductor field effect transistor.

4. The circuit of claim 1, wherein said field effect transistor is a carbon nanotube field effect transistor.

5. The circuit of claim 1, wherein said field effect transistor is a multiple gate field effect transistor.

6. The circuit of claim 1, wherein said differential amplifier is an operational amplifier.

7. The circuit of claim 1, further comprising a sense amplifier having an input terminal, wherein said input terminal of said sense amplifier is electrically connected to said drain terminal of said field effect transistor.

8. The circuit of claim 1, further comprising a sense amplifier having an input terminal, wherein said input terminal of said sense amplifier is electrically connected to said output terminal of said differential amplifier.

9. A circuit for determining a resistive state of a resistive change element, said circuit comprising:

a current source having an output terminal, wherein said current source is configured to supply a set amount of current to said output terminal, and wherein said set amount of current is the same amount for different resistive states of a resistive change element; and

a sense circuit, wherein said sense circuit comprises;

a field effect transistor dimensioned for determining a resistive state of a resistive change element, said field effect transistor having a gate terminal, a source terminal, and a drain terminal, wherein said source terminal of said field effect transistor is electrically connected to said output terminal of said current source; and

a differential amplifier having a non-inverting input terminal, an inverting input terminal, and an output terminal, wherein said non-inverting input terminal is electrically connected to said drain terminal of said field effect transistor, and wherein said output terminal is electrically connected to said gate terminal of said field effect transistor.

10. The circuit of claim 9, wherein said field effect transistor is a metal oxide semiconductor field effect transistor.

11. The circuit of claim 10, wherein said metal oxide semiconductor field effect transistor is a p-channel metal oxide semiconductor field effect transistor.

12. The circuit of claim 9, wherein said field effect transistor is a carbon nanotube field effect transistor.

13. The circuit of claim 9, wherein said field effect transistor is a multiple gate field effect transistor.

14. The circuit of claim 9, wherein said differential amplifier is an operational amplifier.

15. The circuit of claim 9, further comprising a sense amplifier having an input terminal, wherein said input terminal of said sense amplifier is electrically connected to said source terminal of said field effect transistor.

16. The circuit of claim 9, further comprising a sense amplifier having an input terminal, wherein said input terminal of said sense amplifier is electrically connected to said output terminal of said differential amplifier.