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Array substrate, display panel and display device

  • US 9,941,303 B1
  • Filed: 06/28/2017
  • Issued: 04/10/2018
  • Est. Priority Date: 03/23/2017
  • Status: Active Grant
First Claim
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1. An array substrate, comprising:

  • a substrate;

    a plurality of gate lines located on the substrate;

    a plurality of data lines located on the substrate, intersecting and insulated from the plurality of gate lines, wherein the plurality of gate lines and the plurality of data lines defined a plurality of sub-pixel areas;

    wherein the plurality of sub-pixel areas each comprises;

    a thin-film transistor;

    a pixel electrode; and

    a barrier metal electrode;

    wherein the thin-film transistor comprises a source electrode, a drain electrode and a gate electrode, wherein the source electrode is connected with one of the plurality of data lines, the drain electrode is connected with the pixel electrode, and the gate electrode is connected with one of the plurality of gate lines; and

    wherein an orthographic projection of the drain electrode on the substrate is located between orthographic projections of two adjacent data lines on the substrate, and an orthographic projection of the barrier metal electrode on the substrate is located between the orthographic projection of the drain electrode on the substrate and the orthographic projection of at least one of the two adjacent data lines on the substrate.

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