Semiconductor and optoelectronic methods and devices
First Claim
Patent Images
1. An image sensor, comprising:
- a mono-crystallized silicon layer comprising a plurality of image sensor pixels, said mono-crystallized silicon layer bonded to a carrier wafer,wherein said mono-crystallized silicon layer bonded to said carrier wafer leaves a re-useable base wafer used to hold said mono-crystallized silicon layer;
an oxide overlaying said mono-crystallized silicon layer; and
a second mono-crystal layer overlaying said oxide,wherein said second mono-crystal layer comprises a plurality of single crystal transistors aligned to said image sensor pixels,wherein said plurality of single crystal transistors overlay said image sensor pixels, and wherein said second mono-crystal layer is less than 2 microns thick.
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Abstract
A method for processing a semiconductor wafer, the method including: providing a semiconductor wafer including an image sensor pixels layer including a plurality of image sensor pixels, the layer overlaying a wafer substrate; and then bonding the semiconductor wafer to a carrier wafer; and then cutting off a substantial portion of the wafer substrate, and then processing the substantial portion of the wafer substrate for reuse.
15 Citations
15 Claims
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1. An image sensor, comprising:
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a mono-crystallized silicon layer comprising a plurality of image sensor pixels, said mono-crystallized silicon layer bonded to a carrier wafer, wherein said mono-crystallized silicon layer bonded to said carrier wafer leaves a re-useable base wafer used to hold said mono-crystallized silicon layer; an oxide overlaying said mono-crystallized silicon layer; and a second mono-crystal layer overlaying said oxide, wherein said second mono-crystal layer comprises a plurality of single crystal transistors aligned to said image sensor pixels, wherein said plurality of single crystal transistors overlay said image sensor pixels, and wherein said second mono-crystal layer is less than 2 microns thick.
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2. An image sensor wafer, comprising:
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a mono-crystallized silicon layer comprising a plurality of image sensor pixels, said mono-crystallized silicon layer bonded to a carrier wafer, wherein said mono-crystallized silicon layer bonded to said carrier wafer leaves a re-useable base wafer used to hold said mono-crystallized silicon layer;
an oxide overlaying said mono-crystallized silicon layer; and
a second mono-crystal layer overlaying said oxide, wherein said second mono-crystal layer comprises a plurality of single crystal transistors aligned to said image sensor pixels,wherein said plurality of single crystal transistors overlay said image sensor pixels, and wherein said single crystal transistors form a plurality of pixel control circuits.
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3. An image sensor wafer, comprising:
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a mono-crystallized silicon layer comprising a plurality of image sensor pixels, said mono-crystallized silicon layer bonded to a carrier wafer, wherein said mono-crystallized silicon layer bonded to said carrier wafer leaves a re-useable base wafer used to hold said mono-crystallized silicon layer;
an oxide overlaying said mono-crystallized silicon layer; anda second mono-crystal layer overlaying said oxide, wherein said second mono-crystal layer comprises a plurality of single crystal transistors aligned to said image sensor pixels, and wherein said plurality of single crystal transistors overlay said image sensor pixels. - View Dependent Claims (4, 5, 6, 7, 8)
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9. An image sensor wafer, comprising:
a mono-crystallized silicon layer comprising a plurality of image sensor pixels, said mono-crystallized silicon layer bonded to a carrier wafer; wherein said carrier wafer comprises a mono-crystal layer comprising a plurality of single crystal transistors, wherein said plurality of single crystal transistors are aligned to said image sensor pixels with less than 100 nm alignment error, and wherein said plurality of single crystal transistors overlay said image sensor pixels. - View Dependent Claims (10, 11, 12, 13, 14, 15)
Specification