Complementary metal oxide semiconductor (CMOS) ultrasonic transducers and methods for forming the same

• US 9,944,514 B2
• Filed: 06/19/2017
• Issued: 04/17/2018
• Est. Priority Date: 03/15/2013
• Status: Active Grant

• Current Assignee: BFLY Operations, Inc. (Butterfly Network, Inc.)
• Original Assignee: Butterfly Network, Inc.
• Inventors: Rothberg, Jonathan M., Fife, Keith G., Ralston, Tyler S., Charvat, Gregory L., Sanchez, Nevada J.
• Primary Examiner(s): Smoot, Stephen W
• Application Number:
  US15/626,801
• Publication Number:
  US 20170283254A1
• Time in Patent Office: 302 Days
• CPC Class Codes: B06B 1/02 making use of electrical energy B06B1/18, B06B1/20 take precedence
• CPC Class Codes: B06B 1/0292 Electrostatic transducers, e.g. electret-type
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 1/00134 comprising flexible or deformable structures manufacture of MEMS devices for specific applications, see relevant places, e.g. gyroscopes G01C19/5719, pressure sensors G01L9/0042, accelerometers G01P15/0802, acoustic transducers or diaphragms therefor H04R31/00
• CPC Class Codes: B81C 1/00158 Diaphragms, membranes manufacture process for semi-permeable inorganic membranes B01D67/0039
• CPC Class Codes: B81C 1/00246 Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate
• CPC Class Codes: B81C 1/00301 Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
• CPC Class Codes: B81C 2201/0195 the layer being unstructured
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: B81C 2203/0771 Stacking the electronic processing unit and the micromechanical structure
• CPC Class Codes: G01N 29/2406 Electrostatic or capacitive probes, e.g. electret or cMUT-probes
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure
• CPC Class Codes: H04R 19/005 using semiconductor materials

Abstract

Complementary metal oxide semiconductor (CMOS) ultrasonic transducers (CUTs) and methods for forming CUTs are described. The CUTs may include monolithically integrated ultrasonic transducers and integrated circuits for operating in connection with the transducers. The CUTs may be used in ultrasound devices such as ultrasound imaging devices and/or high intensity focused ultrasound (HIFU) devices.

Claims

1. An ultrasonic transducer apparatus, comprising:

a bonded structure having;

a substrate having a metal oxide semiconductor (MOS) integrated circuit and an electrode;

a conductive membrane bonded to the substrate such that a sealed cavity exists between an uppermost portion of the substrate and a first side of the conductive membrane, thereby defining, at least in part, an ultrasonic transducer, with the sealed cavity disposed between the conductive membrane and the electrode; and

the uppermost portion of the substrate providing an electrical connection between the MOS integrated circuit and the first side of the conductive membrane.

2. The ultrasonic transducer apparatus of claim 1, wherein the uppermost portion of the substrate comprises a conductive standoff.

3. The ultrasonic transducer apparatus of claim 2, wherein the conductive standoff comprises titanium nitride (TiN).

4. The ultrasonic transducer apparatus of claim 1, wherein the uppermost portion of the substrate comprises both an insulating material and a conductive material.

5. The ultrasonic transducer apparatus of claim 1, wherein the uppermost portion of the substrate comprises an insulating material having a conductive via embedded therein.

6. The ultrasonic transducer apparatus of claim 5, wherein the insulating material comprises silicon oxide (SiO₂) and the conductive via comprises tungsten (W).

7. The ultrasonic transducer apparatus of claim 1, wherein the conductive membrane has a substantially uniform thickness.

8. The ultrasonic transducer apparatus of claim 1, wherein the conductive membrane has a peripheral portion of a first thickness and center portion of a second thickness, the second thickness greater than the first thickness and corresponding to a location opposite the electrode.

9. The ultrasonic transducer apparatus of claim 8, wherein the first side of the conductive membrane proximate the cavity has a substantially planar surface, and a second side of the conductive membrane opposite the first side has a non-planar surface.

10. The ultrasonic transducer apparatus of claim 8, wherein the first side of the conductive membrane proximate the cavity has a non-planar surface, and a second side of the conductive membrane opposite the first side has a substantially planar surface.

11. The ultrasonic transducer apparatus of claim 1, further comprising a membrane stop disposed between the electrode and the conductive membrane.

12. The ultrasonic transducer apparatus of claim 11, wherein the membrane stop is configured to come into contact with both the electrode and the conductive membrane in a collapse mode of operation.

13. A method, comprising:

bonding a first wafer to a semiconductor wafer, the semiconductor wafer having a metal oxide semiconductor (MOS) integrated circuit and an electrode;

removing at least a portion of the first wafer to define a conductive membrane such that a sealed cavity exists between an uppermost portion of the semiconductor wafer and a first side of the conductive membrane, thereby defining, at least in part, an ultrasonic transducer, with the sealed cavity disposed between the conductive membrane and the electrode; and

the uppermost portion of the semiconductor wafer providing an electrical connection between the MOS integrated circuit and the first side of the conductive membrane.

14. The method of claim 13, wherein the uppermost portion of the semiconductor wafer comprises a conductive standoff.

15. The method of claim 14, wherein the conductive standoff comprises titanium nitride (TiN).

16. The method of claim 13, wherein the uppermost portion of the semiconductor wafer comprises both an insulating material and a conductive material.

17. The method of claim 13, wherein the uppermost portion of the semiconductor wafer comprises an insulating material having a conductive via embedded therein.

18. The method of claim 17, wherein the insulating material comprises silicon oxide (SiO₂) and the conductive via comprises tungsten (W).

19. The method of claim 13, wherein the conductive membrane has a substantially uniform thickness.

20. The method of claim 13, wherein the conductive membrane has a peripheral portion of a first thickness and center portion of a second thickness, the second thickness greater than the first thickness and corresponding to a location opposite the electrode.

21. An apparatus, comprising:

a semiconductor wafer having an integrated circuit;

an electrode;

an insulating material having a cavity formed at least partially therein;

a conductive layer contacting the insulating material, sealing the cavity and having a first side proximate the cavity and a second side distal the cavity, wherein the electrode, cavity, and conductive layer together define, at least in part, an ultrasonic transducer, with the cavity being between the electrode and the conductive layer;

a conductive contact coupling the electrode to the integrated circuit; and

a conductive plug embedded in the insulating material and terminating on the first side of the conductive layer proximate the cavity such that a surface of the conductive plug is bonded with the first side of the conductive layer, wherein the conductive plug electrically connects the conductive layer to the integrated circuit, and wherein the electrode and the conductive plug are electrically isolated from each other.

22. The apparatus of claim 21, wherein the semiconductor wafer is a silicon wafer.

23. The apparatus of claim 21, wherein the insulating material is silicon oxide.

24. The apparatus of claim 21, wherein the conductive plug comprises titanium nitride.

25. An apparatus, comprising:

a semiconductor wafer having an integrated circuit;

an electrode;

an insulating material having a cavity formed at least partially therein;

a conductive membrane contacting the insulating material, sealing the cavity and having a first side proximate the cavity and a second side distal the cavity, wherein the electrode, cavity, and conductive membrane together define, at least in part, an ultrasonic transducer, with the cavity being between the electrode and the conductive membrane;

a conductive contact coupling the electrode to the integrated circuit; and

a conductive plug embedded in the insulating material and terminating on the first side of the conductive membrane proximate the cavity without extending through the conductive membrane such that a surface of the conductive plug forms at least part of a bonding interface between the first side of the conductive membrane and the insulating material, the conductive plug electrically connecting the conductive membrane to the integrated circuit, wherein the electrode and the conductive plug are electrically isolated from each other, and wherein the apparatus lacks an electrode that is on the second side of the conductive membrane and that overlies the cavity.

26. The apparatus of claim 25, wherein the semiconductor wafer is a silicon wafer.

27. The apparatus of claim 25, wherein the insulating material is silicon oxide.

28. The apparatus of claim 25, wherein the conductive plug comprises titanium nitride.