Semiconductor device and method for manufacturing the same

• US 9,947,797 B2
• Filed: 09/25/2014
• Issued: 04/17/2018
• Est. Priority Date: 05/29/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Akimoto, Kengo
• Primary Examiner(s): Naraghi, Ali
• Application Number:
  US14/496,368
• Publication Number:
  US 20150048363A1
• Time in Patent Office: 1,300 Days
• Field of Search: None
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1248 with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/247 Amorphous materials
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/78609 for preventing leakage current H01L29/78618 takes precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.

Claims

1. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a first insulating film over the gate electrode, the first insulating film comprising oxygen;

an oxide semiconductor layer over and in direct contact with the first insulating film;

a second insulating film over and in direct contact with the oxide semiconductor layer, the second insulating film comprising oxygen;

a source electrode and a drain electrode over the second insulating film and in electrical contact with the oxide semiconductor layer via a first contact hole and a second contact hole in the second insulating film, respectively;

a third insulating film continuously formed from a top surface of the source electrode to a top surface of the drain electrode, the third insulating film comprising oxygen;

a planarization layer over the third insulating film, the planarization layer comprising an organic material;

a first electrode over the planarization layer;

a light-emitting layer over the first electrode; and

a second electrode over the light-emitting layer,

wherein the first electrode is in electrical contact with the oxide semiconductor layer via a top surface of the oxide semiconductor layer through one of the source electrode and the drain electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first insulating film and the second insulating film.

2. The semiconductor device according to claim 1,

wherein the first insulating film is a silicon oxynitride film.

3. The semiconductor device according to claim 2,

wherein the silicon oxynitride film includes nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %.

4. The semiconductor device according to claim 1,

wherein the second insulating film is a silicon oxynitride film.

5. The semiconductor device according to claim 4,

wherein the silicon oxynitride film includes nitrogen at a concentration greater than or equal to 3 atomic % and less than or equal to 30 atomic %.

6. The semiconductor device according to claim 1,

wherein the first insulating film comprises a stack of a first oxide film over a nitride film, the first oxide film being in direct contact with the oxide semiconductor layer,

wherein the second insulating film is a second oxide film, and

wherein the third insulating film is a third oxide film.

7. The semiconductor device according to claim 1,

wherein the first insulating film comprises a stack of a first film comprising oxygen and silicon over a film comprising nitrogen and silicon, the first film comprising oxygen and silicon being in direct contact with the oxide semiconductor layer,

wherein the second insulating film is a second film comprising oxygen and silicon, and

wherein the third insulating film is a third film comprising oxygen and silicon.

8. The semiconductor device according to claim 1,

wherein the planarization layer is over and in direct contact with the third insulating film;

wherein the first electrode is in electrical contact with the one of the source electrode and the drain electrode via a contact hole in the planarization layer,

wherein the first electrode comprises a light-transmitting conductive material, and

wherein the first electrode is in electrical contact with the oxide semiconductor layer via a side end surface of the oxide semiconductor layer through the one of the source electrode and the drain electrode.

9. The semiconductor device according to claim 1,

wherein the first electrode is in electrical contact with the oxide semiconductor layer via a side end surface of the oxide semiconductor layer through the one of the source electrode and the drain electrode.

10. The semiconductor device according to claim 9,

wherein an end portion of the source electrode and an end portion of the drain electrode are sandwiched between the second insulating film and the third insulating film.

11. The semiconductor device according to claim 9,

wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least zinc and indium.

12. The semiconductor device according to claim 1,

wherein the first contact hole and the second contact hole define a first top portion and a second top portion of the oxide semiconductor layer, respectively, the first top portion and the second top portion being not covered with the second insulating film, and an entirety of each of the first top portion and the second top portion overlapping the gate electrode.

13. The semiconductor device according to claim 1,

wherein a side end surface of the oxide semiconductor layer and a side end surface of the second insulating film coincide.

14. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer presents an amorphous state.

15. A display device comprising the semiconductor device according to claim 1.

16. The semiconductor device according to claim 1, wherein a portion of a top surface of the third insulating film is at a lower position than a portion of a top surface of the source electrode and a portion of the top surface of the drain electrode.

17. The semiconductor device according to claim 1, wherein the first insulating film comprises nitrogen.

18. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a silicon nitride film over the gate electrode;

a first silicon oxide film over and in direct contact with the silicon nitride film;

an oxide semiconductor layer over and in direct contact with the first silicon oxide film;

a second silicon oxide film over and in direct contact with the oxide semiconductor layer;

a source electrode and a drain electrode over and in direct contact with the second silicon oxide film and with the oxide semiconductor layer via a first contact hole and a second contact hole in the second silicon oxide film, respectively;

a third silicon oxide film continuously formed from a top surface of the source electrode to a top surface of the drain electrode, in direct contact with the source electrode, the drain electrode, and the second silicon oxide film;

a planarization layer over and in direct contact with the third silicon oxide film, the planarization layer comprising an organic material;

a first electrode over the planarization layer and in electrical contact with one of the source electrode and the drain electrode via a contact hole in the planarization layer, the first electrode comprising a light-transmitting conductive material;

a light-emitting layer over the first electrode; and

a second electrode over the light-emitting layer,

wherein the first electrode is in electrical contact with the oxide semiconductor layer via a top surface of the oxide semiconductor layer through the one of the source electrode and the drain electrode,

wherein the first contact hole and the second contact hole define a first top portion and a second top portion of the oxide semiconductor layer, respectively, the first top portion and the second top portion being not covered with the second silicon oxide film, and an entirety of each of the first top portion and the second top portion overlapping the gate electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first silicon oxide film and the second silicon oxide film.

19. The semiconductor device according to claim 18,

wherein the first electrode is in electrical contact with the oxide semiconductor layer via a side end surface of the oxide semiconductor layer through the one of the source electrode and the drain electrode.

20. The semiconductor device according to claim 18,

wherein a side end surface of the oxide semiconductor layer and a side end surface of the second silicon oxide film coincide.

21. The semiconductor device according to claim 18,

wherein an end portion of the source electrode and an end portion of the drain electrode are sandwiched between the second silicon oxide film and the third silicon oxide film.

22. The semiconductor device according to claim 18,

wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least zinc and indium.

23. The semiconductor device according to claim 18,

wherein the oxide semiconductor layer presents an amorphous state.

24. A display device comprising the semiconductor device according to claim 18.

25. The semiconductor device according to claim 18, wherein a portion of a top surface of the third silicon oxide film is at a lower position than a portion of the top surface of the source electrode and a portion of the top surface of the drain electrode.

26. A semiconductor device comprising:

a gate electrode over a substrate having an insulating surface;

a silicon nitride film over the gate electrode;

a first silicon oxide film over and in direct contact with the silicon nitride film;

an oxide semiconductor layer over and in direct contact with the first silicon oxide film;

a second silicon oxide film over and in direct contact with the oxide semiconductor layer;

a source electrode and a drain electrode over and in direct contact with the second silicon oxide film and with the oxide semiconductor layer via a first contact hole and a second contact hole in the second silicon oxide film, respectively;

a third silicon oxide film continuously formed from a top surface of the source electrode to a top surface of the drain electrode, in direct contact with the source electrode, the drain electrode, and the second silicon oxide film;

a planarization layer over the third silicon oxide film, the planarization layer comprising an organic material; and

a first electrode over the planarization layer;

a light-emitting layer over the first electrode; and

a second electrode over the light-emitting layer,

wherein the first electrode is in electrical contact with the oxide semiconductor layer via a side end surface and a top surface of the oxide semiconductor layer through one of the source electrode and the drain electrode, and

wherein a channel formation region of the oxide semiconductor layer is interposed between the first silicon oxide film and the second silicon oxide film.

27. The semiconductor device according to claim 26,

wherein the first contact hole and the second contact hole define a first top portion and a second top portion of the oxide semiconductor layer, respectively, the first top portion and the second top portion being not covered with the second silicon oxide film, and an entirety of each of the first top portion and the second top portion overlapping the gate electrode.

28. The semiconductor device according to claim 26,

wherein the side end surface of the oxide semiconductor layer and a side end surface of the second silicon oxide film coincide.

29. The semiconductor device according to claim 26,

wherein an end portion of the source electrode and an end portion of the drain electrode are sandwiched between the second silicon oxide film and the third silicon oxide film.

30. The semiconductor device according to claim 26,

wherein the oxide semiconductor layer comprises an oxide semiconductor film including at least zinc and indium.

31. The semiconductor device according to claim 26,

wherein the oxide semiconductor layer presents an amorphous state.

32. A display device comprising the semiconductor device according to claim 26.

33. The semiconductor device according to claim 26, wherein a portion of a top surface of the third silicon oxide film is at a lower position than a portion of the top surface of the source electrode and a portion of the top surface of the drain electrode.

34. A semiconductor device comprising:

a gate electrode;

a first insulating film over the gate electrode, the first insulating film comprising oxygen;

an oxide semiconductor layer over and in direct contact with the first insulating film;

a second insulating film over and in direct contact with the oxide semiconductor layer, the second insulating film comprising oxygen;

a source electrode over the oxide semiconductor layer, the source electrode being in electrical contact with the oxide semiconductor layer, wherein a part of the source electrode is located in a first contact hole in the second insulating film;

a drain electrode over the oxide semiconductor layer, the drain electrode being in electrical contact with the oxide semiconductor layer, wherein a part of the drain electrode is located in a second contact hole in the second insulating film;

a third insulating film over the second insulating film, the source electrode, and the drain electrode, the third insulating film comprising oxygen, wherein the third insulating film is in direct contact with a top surface of the second insulating film;

a fourth insulating film over the third insulating film, the fourth insulating film comprising an organic material;

a conductive film over the fourth insulating film, the conductive film being in electrical contact with one of the source electrode and the drain electrode, wherein a part of the conductive film is located in a contact hole in the fourth insulating film,

wherein each of the first contact hole and the second contact hole comprises a region overlapping with the gate electrode,

wherein the contact hole comprises a region not overlapping with the first contact hole and not overlapping with the second contact hole.

35. The semiconductor device according to claim 34, further comprising a light-emitting layer over the conductive film.

36. The semiconductor device according to claim 34, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

37. The semiconductor device according to claim 34, wherein the conductive film is a pixel electrode.

38. The semiconductor device according to claim 34, wherein the gate electrode comprises a tapered end portion.

39. A semiconductor device comprising:

a gate electrode;

a first insulating film over the gate electrode, the first insulating film comprising oxygen;

an oxide semiconductor layer over and in direct contact with the first insulating film;

a second insulating film over and in direct contact with the oxide semiconductor layer, the second insulating film comprising oxygen;

a source electrode over the oxide semiconductor layer, the source electrode being in electrical contact with the oxide semiconductor layer, wherein a part of the source electrode is located in a first contact hole in the second insulating film;

a drain electrode over the oxide semiconductor layer, the drain electrode being in electrical contact with the oxide semiconductor layer, wherein a part of the drain electrode is located in a second contact hole in the second insulating film;

a third insulating film over the second insulating film, the source electrode, and the drain electrode, the third insulating film comprising oxygen, wherein the third insulating film is in direct contact with a top surface of the second insulating film;

a fourth insulating film over the third insulating film, the fourth insulating film comprising an organic material;

a conductive film over the fourth insulating film, the conductive film being in electrical contact with one of the source electrode and the drain electrode, wherein a part of the conductive film is located in a contact hole in the fourth insulating film,

wherein each of the first contact hole and the second contact hole comprises a region overlapping with the gate electrode,

wherein the source electrode comprises a depressed portion overlapping with the first contact hole,

wherein the drain electrode comprises a depressed portion overlapping with the second contact hole,

wherein the contact hole comprises a region not overlapping with the first contact hole and not overlapping with the second contact hole.

40. The semiconductor device according to claim 39, further comprising a light-emitting layer over the conductive film.

41. The semiconductor device according to claim 39, wherein the oxide semiconductor layer comprises indium, gallium and zinc.

42. The semiconductor device according to claim 39, wherein the conductive film is a pixel electrode.

43. The semiconductor device according to claim 39, wherein the gate electrode comprises a tapered end portion.