Transistor, method for manufacturing transistor, semiconductor device, and electronic device

• US 9,947,800 B2
• Filed: 06/01/2017
• Issued: 04/17/2018
• Est. Priority Date: 03/02/2015
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Yamamoto, Yoshitaka
• Primary Examiner(s): HO, TU TU V
• Application Number:
  US15/610,683
• Publication Number:
  US 20170271521A1
• Time in Patent Office: 320 Days
• Field of Search: 257 43
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/477 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/38 - H01L21/449 and H01L21/461 - H01L21/475 take precedence
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/0684 characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.

Claims

1. A method for manufacturing a transistor comprising the steps of:

forming a second oxide layer over a first oxide layer;

processing the first oxide layer and the second oxide layer into an island shape;

forming a third oxide layer to cover the second oxide layer;

forming a first insulating layer to cover the third oxide layer;

forming a first electrode over the first insulating layer;

removing part of the third oxide layer and part of the first insulating layer using the first electrode as a mask to expose part of the second oxide layer;

introducing elements to the part of the second oxide layer;

forming a second insulating layer;

processing the second insulating layer to form a structure body covering a side surface of the first electrode;

forming a second electrode and a third electrode to be in contact with the exposed region of the second oxide layer;

forming a third insulating layer to cover the second electrode and the third electrode;

introducing oxygen to the third insulating layer when a fourth insulating layer is formed to cover the third insulating layer; and

performing a heat treatment after the step of introducing oxygen to the third insulating layer when the fourth insulating layer is formed to cover the third insulating layer,

wherein the second oxide layer is an oxide semiconductor.

2. The method for manufacturing a transistor according to claim 1, wherein the structure body comprises silicon and oxygen.

3. The method for manufacturing a transistor according to claim 1, wherein the element is tungsten, titanium, aluminum, or a rare gas element.

4. The method for manufacturing a transistor according to claim 1, wherein the step of introducing oxygen to the third insulating layer when the fourth insulating layer is formed to cover the third insulating layer is performed by a sputtering method.

5. The method for manufacturing a transistor according to claim 1, wherein the second oxide layer comprises one or both of indium and zinc.

6. The method for manufacturing a transistor according to claim 1, wherein the second oxide layer comprises a c-axis aligned crystalline oxide semiconductor.

7. The method for manufacturing a transistor according to claim 1, wherein the first oxide layer and the third oxide layer contain a metal element that is the same kind as at least one metal element contained in the second oxide layer.

8. A semiconductor device comprising:

a transistor manufactured by the method according to claim 1; and

a capacitor or a resistor.

9. An electronic device comprising:

the semiconductor device according to claim 8; and

an antenna, a battery, an operation switch, a microphone, or a speaker.

10. An electronic device comprising:

the transistor manufactured by the method according to claim 1; and

an antenna, a battery, an operation switch, a microphone, or a speaker.