Methods and structures of integrated MEMS-CMOS devices

• US 9,950,924 B2
• Filed: 12/30/2015
• Issued: 04/24/2018
• Est. Priority Date: 03/09/2012
• Status: Active Grant

• Current Assignee: mCube, Inc.
• Original Assignee: mCube, Inc.
• Inventors: Sridharamurthy, Sudheer S., Lee, Te-Hse Terrence, Rastegar, Ali J., Stancu, Mugurel, Yang, Xiao Charles
• Primary Examiner(s): PATERSON, BRIGITTE A
• Application Number:
  US14/985,388
• Publication Number:
  US 20160176708A1
• Time in Patent Office: 846 Days
• CPC Class Codes: B81B 2203/0163 Spring holders
• CPC Class Codes: B81B 2207/094 Feed-through, via
• CPC Class Codes: B81B 3/0013 Structures dimensioned for mechanical prevention of stiction, e.g. spring with increased stiffness
• CPC Class Codes: B81B 3/0086 Electrical characteristics, e.g. reducing driving voltage, improving resistance to peak voltage
• CPC Class Codes: B81B 7/0022 Protection against electrostatic discharge electrostatic discharge protection for electronic semiconductor circuits H01L27/0248; circuit arrangements for protecting electronic switching circuits used for pulse technique against overcurrent or overvoltage H03K17/08
• CPC Class Codes: B81B 7/0064 for protecting against electromagnetic or electrostatic interferences
• CPC Class Codes: B81C 1/00238 Joining a substrate with an electronic processing unit and a substrate with a micromechanical structure
• CPC Class Codes: B81C 1/00801 Avoid alteration of functional structures by etching, e.g. using a passivation layer or an etch stop layer B81C1/00595, B81C1/00468 take precedence
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: B81C 2201/05 Temporary protection of devices or parts of the devices during manufacturing
• CPC Class Codes: B81C 2203/0735 Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout

Abstract

A method for fabricating an integrated MEMS-CMOS device uses a micro-fabrication process that realizes moving mechanical structures (MEMS) on top of a conventional CMOS structure by bonding a mechanical structural wafer on top of the CMOS and etching the mechanical layer using plasma etching processes, such as Deep Reactive Ion Etching (DRIE). During etching of the mechanical layer, CMOS devices that are directly connected to the mechanical layer are exposed to plasma. This sometimes causes permanent damage to CMOS circuits and is termed Plasma Induced Damage (PID). Embodiments of the present invention presents methods and structures to prevent or reduce this PID and protect the underlying CMOS circuits by grounding and providing an alternate path for the CMOS circuits until the MEMS layer is completely etched.

Claims

1. A method for fabricating an integrated MEMS-CMOS device comprising:

providing a substrate having a surface region;

forming a CMOS IC layer overlying the surface region, the CMOS IC layer having at least one CMOS electrode coupled to an ESD diode;

forming a mechanical structural layer overlying the CMOS IC layer;

forming at least one MEMS device overlying the CMOS IC layer from a first portion of the mechanical structural layer, the at least one MEMS devices having at least one MEMS electrode;

forming a protection structure from a second portion of the mechanical structural layer, the protection structure including one or more ground posts and a jumper, wherein the protection structure is coupled to the at least one MEMS electrode and the at least one CMOS electrode through the jumper, wherein the protection structure is configured to couple the CMOS electrode to electrical ground through the one or more ground posts; and

etching the mechanical structural layer to separate the one or more ground posts from the jumper, wherein the CMOS electrode is connected to the electrical ground until the mechanical structural layer is completely etched.

2. The method of claim 1 wherein the ESD diode is coupled to the at least one CMOS electrode.

3. The method of claim 1 wherein the jumper is coupled the at least one MEMS electrode and the at least one CMOS electrode.

4. The method of claim 3 wherein the at least one MEMS electrode and the at least one CMOS electrode are electrically coupled via the jumper after the forming of the at least one MEMS device.

5. The method of claim 1 further comprising forming an electrode ground ring structure overlying the at least one CMOS device, the electrode ground ring structure being coupled to ground and the at least one CMOS device.

6. The method of claim 5 wherein the electrode ground ring structure is configured to direct plasma induced charge from a plasma etching process to ground.

7. The method of claim 1 wherein the forming of the mechanical structural layer, the at least one MEMS device, and the protection structure comprises a plasma etching process.

8. The method of claim 1 wherein the protection structure is configured to direct plasma induced charge from a plasma etching process to ground.

9. The method of claim 1 wherein the one or more MEMS devices comprises an inertial sensor, an accelerometer, a gyrometer, a magnetic field sensor, a pressure sensor, a humidity sensor, a temperature sensor, a chemical sensor, or a biosensor.