Liquid crystal display device and method for driving the same

• US 9,953,595 B2
• Filed: 03/31/2017
• Issued: 04/24/2018
• Est. Priority Date: 07/11/2012
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Miyake, Hiroyuki, Hirakata, Yoshiharu
• Primary Examiner(s): Briggs, Nathanael R
• Assistant Examiner(s): PETERSON, WILLIAM D
• Application Number:
  US15/475,617
• Publication Number:
  US 20170294170A1
• Time in Patent Office: 389 Days
• Field of Search: 349 43
• CPC Class Codes: G02F 1/133345 Insulating layers G02F1/1335, G02F1/1337, G02F1/135, G02F1/136 take precedence
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/133514 Colour filters
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 1/136213 Storage capacitors associated with the pixel electrode
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/121 common or background
• CPC Class Codes: G02F 2201/123 pixel
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio
• CPC Class Codes: G02F 2202/10 semiconductor
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO

Abstract

A liquid crystal display device whose power consumption is reduced while image quality is prevented from being degraded is provided. Further, a method for driving a liquid crystal display device whose power consumption is reduced while image quality is prevented from being degraded is provided. The liquid crystal display device includes a transistor whose leakage current in an off state is reduced and a liquid crystal element. The capacitance of a pixel satisfies the formula (1) and the formula (2).

Claims

1. A liquid crystal display device comprising:

a transistor including an oxide semiconductor material in a channel formation region; and

a liquid crystal element including a liquid crystal layer and a pixel electrode electrically connected to a source or a drain of the transistor,

wherein a minimum value of a capacitance (C_X+C_L1) of a pixel satisfies a formula (1) and a maximum value of the capacitance (C_X+C_L2) of the pixel satisfies a formula (2)

170×

10<sup>−

15</sup>[F]>

(C_X+C_L1) 

 

(1)

(C_x+C_L2)>

50(C_L2−

C_L1) 

 

(2), and

wherein, in the formula (1) and the formula (2), G_T represents a minimum value of a capacitance component of the liquid crystal element, C_L2 represents a maximum value of the capacitance component of the liquid crystal element, (C_L2−

C_L1) represents an amount of change in the capacitance component of the liquid crystal element, and C_X represents the capacitance of the pixel from which a capacitance due to the liquid crystal element is subtracted.

2. The liquid crystal display device according to claim 1, wherein the liquid crystal element comprises:

an insulating layer;

the pixel electrode in contact with one surface of the insulating layer; and

a common electrode being in contact with the other surface of the insulating layer and comprising an opening overlapping with the pixel electrode.

3. The liquid crystal display device according to claim 1, wherein an off-state current of the transistor is less than or equal to 100 zA/μ

m.

4. The liquid crystal display device according to claim 1, wherein the semiconductor material comprises indium and zinc.

5. The liquid crystal display device according to claim 1, wherein the semiconductor material comprises indium, gallium and zinc.

6. The liquid crystal display device according to claim 1, wherein the capacitance of C_X comprises a parasitic capacitance.

7. The liquid crystal display device according to claim 1 further comprising a first substrate,

wherein the first substrate is provided with the transistor, the pixel electrode and a common electrode.

8. The liquid crystal display device according to claim 7 further comprising a second substrate,

wherein the liquid crystal layer is provided between the first substrate and the second substrate.

9. The liquid crystal display device according to claim 8, wherein the second substrate is provided with a color filter and a light-blocking layer.

12. The liquid crystal display device according to claim 1, wherein an off-state current of the transistor is less than or equal to 100 zA/μ

m.

10. A liquid crystal display device comprising:

a plurality of scan lines extending in a row direction;

a plurality of signal lines intersecting with the scan lines and extending in a column direction; and

a pixel in a region surrounded by adjacent scan lines and adjacent signal lines,

wherein the scan lines are arranged at a density of 300 or more per inch,

wherein the signal lines are arranged at a density of 300 or more per inch,

wherein the pixel comprises;

a transistor including a semiconductor material having a wider band gap and a lower intrinsic carrier density than silicon in a channel formation region, a gate electrically connected to one of the plurality of scan lines, and a source and a drain one of which is electrically connected to one of the plurality of signal lines; and

a liquid crystal element including a pixel electrode electrically connected to the other of the source and the drain of the transistor, a liquid crystal layer, and a common electrode, and

wherein a minimum value of a capacitance (C_X+C_L1) of the pixel satisfies a formula (3) and a maximum value of the capacitance (C_X+C_L2) of the pixel satisfies a formula (4)

170×

10<sup>−

15</sup>[F]>

(C_X+C_L1) 

 

(3)

(C_x+C_L2)>

50(C_L2−

C_L1) 

 

(4), and

wherein, in the formula (3) and the formula (4), C_L1 represents a minimum value of a capacitance component of the liquid crystal element, C_L2 represents a maximum value of the capacitance component of the liquid crystal element, (C_L2−

C_L1) represents an amount of change in the capacitance component of the liquid crystal element, and C_X represents the capacitance of the pixel from which a capacitance due to the liquid crystal element is subtracted.

11. The liquid crystal display device according to claim 10, wherein the liquid crystal element comprises:

an insulating layer;

the pixel electrode in contact with one surface of the insulating layer; and

the common electrode being in contact with the other surface of the insulating layer and comprising an opening overlapping with the pixel electrode.

13. The liquid crystal display device according to claim 10, wherein the semiconductor material comprises indium and zinc.

14. The liquid crystal display device according to claim 10, wherein the semiconductor material comprises indium, gallium and zinc.

15. The liquid crystal display device according to claim 10, wherein the capacitance of C_X comprises a parasitic capacitance.

16. The liquid crystal display device according to claim 10 further comprising a first substrate,

wherein the first substrate is provided with the plurality of scan lines, the plurality of signal lines, the transistor, the pixel electrode and the common electrode.

17. The liquid crystal display device according to claim 16 further comprising a second substrate,

wherein the liquid crystal layer is provided between the first substrate and the second substrate.

18. The liquid crystal display device according to claim 17, wherein the second substrate is provided with a color filter and a light-blocking layer.

19. A method for driving the liquid crystal display device according to claim 10, comprising:

a first step of inputting a selection signal to one of the scan lines to select a plurality of pixels electrically connected to the one of the scan lines; and

a second step of inputting image signals having alternating opposite polarities to a first signal line and a second signal line arranged with a pixel provided therebetween to sequentially write the image signals into the plurality of pixels.