Gate driver circuit, touch display device and touch display driving method
First Claim
1. A gate driver circuit, comprising a plurality of GOA unit groups arranged successively and control units arranged between every two adjacent GOA unit groups, each of the GOA unit groups comprising a plurality of shift registers which are cascaded, wherein,the control unit is configured to output a start control signal at a high level to a signal input end of a first stage shift register of a next GOA unit group corresponding thereto, after a last stage shift register of a previous GOA unit group corresponding thereto completes driving for a corresponding gate line and a predetermined time elapses, so as to pre-charge the first stage shift register of the next GOA unit group, andwherein the control unit comprises a first transistor, a second transistor and a capacitor;
- a control electrode of the first transistor is connected with a first electrode of the first transistor and also connected with a signal output end of the last stage shift register of the previous GOA unit group, a second electrode of the first transistor is connected with a first end of the capacitor and a control electrode of the second transistor;
a first electrode of the second transistor is connected with a start control signal output end, and a second electrode of the second transistor is connected with the signal input end of the first stage shift register of the next GOA unit group;
a second end of the capacitor is grounded, or connected with a first power supply end, or connected with the second electrode of the second transistor; and
the start control signal output end is configured to output the start control signal.
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Abstract
Embodiments of the present invention provide a gate driver circuit, a touch display device and a touch display driving method. The gate driver circuit includes a plurality of GOA unit groups arranged successively and control units arranged between every two adjacent GOA unit groups, each of the GOA unit groups comprising a plurality of shift registers which are cascaded. The control unit is configured to output a start control signal at a high level to a signal input end of a first stage shift register of a next GOA unit group corresponding thereto, after a last stage shift register of a previous GOA unit group corresponding thereto completes driving for a corresponding gate line and a predetermined time elapses, so as to pre-charge the first stage shift register of the next GOA unit group.
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12 Claims
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1. A gate driver circuit, comprising a plurality of GOA unit groups arranged successively and control units arranged between every two adjacent GOA unit groups, each of the GOA unit groups comprising a plurality of shift registers which are cascaded, wherein,
the control unit is configured to output a start control signal at a high level to a signal input end of a first stage shift register of a next GOA unit group corresponding thereto, after a last stage shift register of a previous GOA unit group corresponding thereto completes driving for a corresponding gate line and a predetermined time elapses, so as to pre-charge the first stage shift register of the next GOA unit group, and wherein the control unit comprises a first transistor, a second transistor and a capacitor; -
a control electrode of the first transistor is connected with a first electrode of the first transistor and also connected with a signal output end of the last stage shift register of the previous GOA unit group, a second electrode of the first transistor is connected with a first end of the capacitor and a control electrode of the second transistor; a first electrode of the second transistor is connected with a start control signal output end, and a second electrode of the second transistor is connected with the signal input end of the first stage shift register of the next GOA unit group; a second end of the capacitor is grounded, or connected with a first power supply end, or connected with the second electrode of the second transistor; and the start control signal output end is configured to output the start control signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification