Barrier layer above anti-punch through (APT) implant region to improve mobility of channel region of fin field effect transistor (FinFET) device structure
First Claim
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1. A fin field effect transistor (FinFET) device structure, comprising:
- a substrate;
a fin structure extending from the substrate;
an anti-punch through implant (APT) region formed in the fin structure;
a barrier layer formed on the APT region, wherein the barrier layer has a width in a horizontal direction, and the width gradually tapers from a bottom of the barrier layer to a top of the barrier layer; and
an epitaxial layer formed on the barrier layer.
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Abstract
A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate and a fin structure extending from the substrate. The FinFET device structure also includes an anti-punch through implant (APT) region formed in the fin structure and a barrier layer formed on the APT region. The barrier layer has a middle portion and a peripheral portion, and the middle portion is higher than the peripheral portion. The FinFET device structure further includes an epitaxial layer formed on the barrier layer.
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Citations
19 Claims
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1. A fin field effect transistor (FinFET) device structure, comprising:
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a substrate; a fin structure extending from the substrate; an anti-punch through implant (APT) region formed in the fin structure; a barrier layer formed on the APT region, wherein the barrier layer has a width in a horizontal direction, and the width gradually tapers from a bottom of the barrier layer to a top of the barrier layer; and an epitaxial layer formed on the barrier layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A fin field effect transistor (FinFET) device structure, comprising:
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a substrate; a first fin structure and a second fin structure formed on the substrate; a first anti-punch through implant (APT) region formed in the first fin structure; a barrier layer formed on the first APT region, wherein the barrier layer has a convex structure, wherein the barrier layer has a horizontal width which gradually tapers from a bottom to a top of the barrier layer; and an epitaxial layer formed on the barrier layer; a second APT region formed in the second fin structure; and an isolation structure formed on the substrate, wherein a top surface of the first APT region is below a top surface of the isolation structure. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A fin field effect transistor (FinFET) device structure, comprising:
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a substrate; a first fin structure and a second fin structure extending from the substrate; an isolation structure formed over the substrate, wherein the first fin structure and the second fin structure are embedded in the isolation structure; a first anti-punch through implant (APT) region formed in the first fin structure; a barrier layer formed on the first APT region, wherein the barrier layer has a convex cross-sectional profile with two outer-most points which are level with a top surface of the isolation structure; an epitaxial structure formed over the barrier layer, wherein the epitaxial structure has a curved bottom surface; and a second APT region formed over the second fin structure, wherein a top surface of the second APT region is level with a top surface of the epitaxial structure. - View Dependent Claims (19)
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Specification