Method for forming solder bumps using sacrificial layer

• US 9,953,908 B2
• Filed: 10/30/2015
• Issued: 04/24/2018
• Est. Priority Date: 10/30/2015
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Lewandowski, Eric P., Nah, Jae-Woong, Sorce, Peter J.
• Primary Examiner(s): Tugbang, A. Dexter
• Assistant Examiner(s): Carley, Jeffrey T
• Application Number:
  US14/928,263
• Publication Number:
  US 20170125329A1
• Time in Patent Office: 907 Days
• CPC Class Codes: H01L 21/0273 characterised by the treatment of photoresist layers
• CPC Class Codes: H01L 21/32051 Deposition of metallic or metal-silicide layers
• CPC Class Codes: H01L 21/32133 by chemical means only
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 2224/11 Manufacturing methods
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 23/49866 characterised by the materials materials of the substrates H01L23/14, of the lead-frames H01L23/49579
• CPC Class Codes: H01L 23/49894 Materials of the insulating layers or coatings
• CPC Class Codes: H05K 2203/04 Soldering or other types of metallurgic bonding using molten metal H05K2203/128
• CPC Class Codes: H05K 3/064 Photoresists
• CPC Class Codes: H05K 3/12 using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
• CPC Class Codes: H05K 3/3457 Solder materials or compositions; Methods of application thereof
• CPC Class Codes: H05K 3/4007 Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457

Abstract

A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.

Claims

1. A method of making a circuit, comprising:

providing a plurality of spaced apart conductive contact pads on a substrate, wherein each conductive contact pad is separated by a solder resist and each solder resist and each conductive pad is in direct physical contact with a surface of the substrate;

forming a metallic layer on physically exposed surfaces of each conductive contact pad and each solder resist;

applying a photoresist layer on the metallic layer;

forming a plurality of first openings in the photoresist layer exposing portions of the metallic layer;

etching the exposed portions of the metallic layer to physically expose a topmost surface of each conductive contact pad, while maintaining portions of the metallic layer on the solder resist that is located beneath remaining portions of the photoresist layer;

placing solder directly on the physically exposed topmost surface of each conductive contact pad;

removing, after the placing of the solder, the remaining portions of the photoresist layer with a chemical composition to expose the remaining portions of the metallic layer, the substrate being protected from the chemical composition by the remaining portions of the metallic layer; and

removing the remaining portions of the metallic layer to physically expose the solder resist that is in direct physical contact with the surface of the substrate.

2. The method of claim 1, wherein the substrate is an organic substrate.

3. The method of claim 1, wherein the photoresist layer comprises a dry film layer.

4. The method of claim 1, wherein the metallic layer thickness is from 10 nm to 1000 nm.

5. The method of claim 1, wherein the metallic layer comprises a metal selected from the group consisting of Al, Ti, Cr, Cu, Pd, Au, and alloys thereof.

6. The method of claim 1, wherein the placing solder comprises passing a filling head containing molten solder over the photoresist layer and causing the filling head to inject molten solder to fill the first openings.

7. The method of claim 1, wherein placing the solder comprises injecting flux-free molten solder into the first openings.

8. The method of claim 1, wherein the chemical composition comprises dimethylsulfoxide.