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Thyristor random access memory device and method

  • US 9,954,075 B2
  • Filed: 10/03/2016
  • Issued: 04/24/2018
  • Est. Priority Date: 06/29/2010
  • Status: Active Grant
First Claim
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1. A method comprising:

  • forming two vertically coupled P-N junctions on a first substrate;

    forming a conductor region over the two vertically coupled P-N junctions;

    flipping the first substrate, and bonding the conductor region to a dielectric material of a second substrate;

    forming a third vertically coupled P-N junction on a back side of a portion of the first substrate;

    forming a control line between two of the vertically coupled P-N junctions;

    forming a buried transmission line from a portion of the conductor region; and

    forming a second transmission line on top of the third vertically coupled P-N junction.

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