Memory device including risky mapping table and controlling method thereof

• US 9,959,044 B2
• Filed: 05/03/2016
• Issued: 05/01/2018
• Est. Priority Date: 05/03/2016
• Status: Active Grant

• Current Assignee: Macronix International Co., Ltd.
• Original Assignee: Macronix International Co., Ltd.
• Inventors: Liu, Ting-Yu, Kuo, Nai-Ping, Liu, Yi-Chun, Liu, Jian-Shing
• Primary Examiner(s): TSAI, SHENG JEN
• Application Number:
  US15/145,504
• Publication Number:
  US 20170322735A1
• Time in Patent Office: 728 Days
• Field of Search: 711202
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/152 Virtualized environment, e.g. logically partitioned system
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 3/0605 by facilitating the interaction with a user or administrator
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/0631 by allocating resources to storage systems
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 3/068 Hybrid storage device

Abstract

A memory device includes a first storage unit storing an address mapping table, and a control unit coupled to the first storage unit and including a second storage unit storing a risky mapping table and a cached mapping table. The control unit is configured to: write data into the first storage unit; update mapping information associated with the data in the risky mapping table; and store mapping information in the cached mapping table into the address mapping table.

Claims

1. A memory device, comprising:

a first storage unit storing an address mapping table;

a control unit coupled to the first storage unit and including a second storage unit storing a risky mapping table and a cached mapping table, wherein the risky mapping table stores mapping information of risky data, the risky data being data that can be damaged by power interruption;

wherein the control unit is configured to;

write data into the first storage unit;

update mapping information associated with the data in the risky mapping table;

when the data has been written into an upper page in a set of paired pages in the first storage unit, commit mapping information that is in the risky mapping table and that is associated with the data into the cached mapping table; and

store mapping information in the cached mapping table into the address mapping table.

2. The memory device of claim 1, wherein the control unit is further configured to:

receive a write command from a host, the write command including data to be written into the first storage unit and a logical address associated with the data;

obtain mapping information corresponding to the logical address; and

translate the logical address into a physical address according to the mapping information.

3. The memory device of claim 2, wherein the control unit is further configured to:

perform a pre-read operation or a post-read operation based on the physical address and the size of the host data.

4. The memory device of claim 1, wherein the control unit is configured to, in response to a read command including a logical address:

obtain mapping information corresponding to the logical address;

translate the logical address into a physical address; and

read data from the first storage unit according to the physical address.

5. The memory device of claim 1, wherein the control unit is further configured to, when receiving a command including a logical address, obtain mapping information corresponding to the logical address by:

searching for the mapping information corresponding to the logical address in the risky mapping table;

if the mapping information is not stored in the risky mapping table, searching for the mapping information corresponding to the logical address in the cached mapping table and, if the mapping information is stored in the cached mapping table, loading the mapping information from the cached mapping table into the risky mapping table; and

if the mapping information is not stored in the cached mapping table, loading part of the mapping information that is stored in the address mapping table into the cached mapping table, searching for the mapping information corresponding to the logical address in the cached mapping table, and, if the mapping information is stored in the cached mapping table, loading the mapping information from the cached mapping table into the risky mapping table.

6. The memory device of claim 1, wherein the control unit is further configured to:

assign a sequence number to be associated with the updated mapping information of the host data;

write metadata associated with the host data into the first storage unit, the metadata including the updated mapping information associated with the host data and the sequence number associated with the updated mapping information; and

store the sequence number associated with the updated mapping information into the risky mapping table.

7. The memory device of claim 6, wherein the control unit is configured to:

when committing the mapping information that is in the risky mapping table and that is associated with data into the cached mapping table, select a lowest sequence number from the sequence numbers associated with the mapping information committed into the cached mapping table, and store the lowest sequence number into the cached mapping table; and

when storing the mapping information in the cached mapping table into the address mapping table, store the sequence number stored in the cached mapping table into the address mapping table.

8. The memory device of claim 7, wherein the control unit in further configured to, after power has been restored following a power interruption:

find a greatest sequence number in the address mapping table;

scan sequence numbers included in the metadata associated with the data stored in a current data block of the first storage unit to find one or more sequence numbers that are greater than the greatest sequence number in the address mapping table; and

rebuild the risky mapping table based on the mapping information associated with the one or more sequence numbers included in the metadata.

9. The memory device of claim 1, wherein the control unit is further configured to:

determine whether the data has been written into an upper page in a set of paired pages in the first storage unit based on the physical address of the data in the first storage unit.

10. A method for controlling a memory device by a control unit, the memory device including a first storage unit, the control unit including a second storage unit, the method comprising:

writing data into the first storage unit;

updating mapping information associated with the data in a risky mapping table included in the second storage unit, wherein the risky mapping table stores mapping information of risky data, the risky data being data that can be damaged by power interruption;

when the data has been written into an upper page in a set of paired pages in the first storage unit, committing mapping information that is in the risky mapping table and that is associated with the data into a cached mapping table included in the second storage unit; and

storing mapping information in the cached mapping table included in the second storage unit into an address mapping table included in the first storage unit.

11. The method of claim 10, further comprising:

receiving a write command from a host, the write command including data to be written into the first storage unit and a logical address associated with the data; and

obtaining mapping information corresponding to the logical address; and

translating the logical address into a physical address according to the mapping information.

12. The method of claim 10, further comprising, when receiving a command including a logical address, obtaining mapping information corresponding to a logical address by:

searching for the mapping information corresponding to the logical address in the risky mapping table;

if the mapping information is not stored in the risky mapping table, searching for the mapping information corresponding to the logical address in the cached mapping table and, if the mapping information is stored in the cached mapping table, loading the mapping information from the cached mapping table into the risky mapping table; and

if the mapping information is not stored in the cached mapping table, loading part of the mapping information that is stored in the address mapping table into the cached mapping table, searching for the mapping information corresponding to the logical address in the cached mapping table, and, if the mapping information is stored in the cached mapping table, loading the mapping information from the cached mapping table into the risky mapping table.

13. The method of claim 11, further comprising:

performing at least one of a pre-read operation or a post-read operation based on the physical address and the size of the host data.

14. The method of claim 10, the method further comprising:

in response to a read command including a logical address, obtaining mapping information corresponding to the logical address;

translating the logical address into a physical address; and

reading data from the first storage unit according to the physical address.

15. The method of claim 10, further comprising:

assigning a sequence number to be associated with the updated mapping information of the host data;

when writing the host data into the first storage unit, writing metadata associated with the host data into the first storage unit, the metadata including the updated mapping information associated with the host data and the sequence number associated with the updated mapping information; and

storing the sequence number associated with the updated mapping information into the risky mapping table.

16. The method of claim 15, further comprising:

when committing the mapping information that is in the risky mapping table and that is associated with data into the cached mapping table, selecting a lowest sequence number from the sequence numbers associated with the mapping information committed into the cached mapping table, and storing the lowest sequence number into the cached mapping table; and

when storing the mapping information in the cached mapping table into the address mapping table, storing the sequence number stored in the cached mapping table into the address mapping table.

17. The method of claim 16, further comprising:

determining that data in the second storage unit is damaged;

finding a greatest sequence number in the address mapping table;

scanning sequence numbers included in the metadata associated with the data stored in a current data block of the first storage unit to find one or more sequence numbers that are greater than the greatest sequence number in the address mapping table; and

rebuilding the risky mapping table based on the mapping information included in the metadata and associated with the one or more sequence numbers that are greater than the greatest sequence number in the address mapping table.

18. The method of claim 10, further comprising:

determining whether the data has been written into an upper page in a set of paired pages in the first storage unit based on the physical address of the data in the first storage unit.