Debugging in a semiconductor device test environment

• US 9,959,186 B2
• Filed: 11/19/2012
• Issued: 05/01/2018
• Est. Priority Date: 11/19/2012
• Status: Active Grant

• Current Assignee: Teradyne Incorporated
• Original Assignee: Teradyne Incorporated
• Inventors: Hutner, Marc Reuben, Rowe, John F.
• Primary Examiner(s): CONTINO, PAUL F
• Application Number:
  US13/680,407
• Publication Number:
  US 20140143600A1
• Time in Patent Office: 1,989 Days
• Field of Search: 714 27, 714 32, 714 34
• CPC Class Codes: G01R 31/31705 Debugging aspects, e.g. using test circuits for debugging, using dedicated debugging test circuits generation of test sequences therefor G01R31/31835, using scan test therefor G01R31/318544
• CPC Class Codes: G01R 31/31707 Test strategies methods for generation of test sequences G01R31/318371
• CPC Class Codes: G01R 31/319 Tester hardware, i.e. output processing circuits
• CPC Class Codes: G06F 11/2294 by remote test
• CPC Class Codes: G06F 11/263 Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
• CPC Class Codes: G06F 11/2733 Test interface between tester and unit under test
• CPC Class Codes: G06F 11/362 Software debugging

Abstract

A test system that enables real-time interactive debugging of a device under test (DUT) using native customer code. A translation module may format, in real time, debug commands, corresponding to a user input, into a format recognizable by instruments in a tester. The user input may be a test program or test instructions written in a high-level programming language. The translation module may translate the user'"'"'s debug commands into lower-level test instrument commands, based on which the tester may apply control signals to a processor in the DUT to test subsystems of the DUT. A result of the test may be provided to the translation module, which may, in real time, format another debug command, or provide an indication of the result to the user. The translation module may thus enable a user to step-through and modify native customer code in an interactive manner to debug a DUT.

Claims

1. At least one non-transitory computer-readable storage medium comprising computer-executable instructions that, when executed on at least one processor of a computing device, implement a debug method on a device under test (DUT), the method comprising:

interactively receive debug inputs from at least one human operator through a user interface of the computing device, wherein the debug inputs comprise instructions in a native language of a third party tool;

access a test program, the test program comprising a plurality of test program commands, wherein the debug inputs comprise at least one command to suspend execution of the test program at a predetermined location within the test program; and

control automatic test equipment, comprising a plurality of instruments, to;

select from a plurality of protocols a protocol associated with the DUT based on a response received from the DUT;

generate instrument commands configured to control the plurality of instruments to stimulate a device under test (DUT) and receive responses from the DUT in accordance with the debug inputs and the test program commands, wherein instrument commands are generated, at least in part, based on the selected protocol associated with the DUT, wherein;

generate instrument commands configured to control instruments in accordance with the debug inputs and the test program commands comprises generating instrument commands configured to control instruments to perform test program commands in the test program up until the predetermined location; and

apply the instrument commands to instruments in the automatic test equipment, wherein the instrument commands specify at least one of levels and timing of a signal generated by the instruments.

2. The non-transitory computer-readable storage medium of claim 1,

wherein:

interactively receiving debug inputs comprises;

receiving a first and a second debug input from the user interface,

generating a first debug command in accordance with the first debug input,

applying the first debug command to the automatic test equipment, and

in response to a result of applying the first debug command to the automatic test equipment, generating a second debug command in accordance with the second debug input.

3. The non-transitory computer-readable storage medium of claim 1, wherein:

interactively receiving debug inputs comprises generating the instrument commands in real time following receipt of the debug inputs.

4. The non-transitory computer-readable storage medium of claim 1, wherein:

stimulating a DUT and receiving responses from the DUT are configured to be performed in accordance with a functionally correct working environment for the DUT.

5. The non-transitory computer-readable storage medium of claim 1, wherein:

the computer executable instructions that generate instrument commands comprise computer-executable instructions for translating the debug inputs and test program commands into a binary test pattern.

6. The non-transitory computer-readable storage medium of claim 1, wherein the debug method further comprises:

presenting to the user an indication that test program commands in the test program up until the predetermined location were executed.

7. The non-transitory computer-readable storage medium of claim 1, further comprising:

computer-executable instructions that, when executed, receive program modification commands from the user of the computing device and modify the test program based on the received program modification commands.

8. The non-transitory computer-readable storage medium of claim 1, wherein:

the debug inputs comprise at least one command to read data from the DUT;

the debug inputs are independent of a protocol for reading data from the DUT.

9. The non-transitory computer-readable storage medium of claim 1, further comprising the test program, wherein:

the test program comprises instructions for execution on a processor within the DUT to control the processor to interact with a core on the DUT to generate and/or measure test data relating to the core.

10. The non-transitory computer-readable storage medium of claim 1, wherein:

the third party tool is a third party tool used by design engineers.

11. A method of operating automatic test equipment to test a device under test (DUT), the method comprising:

with at least one debug tool, receiving user input with a user computer executing a design engineering tool and, in response to the user input, generating a plurality of debug commands;

receiving the plurality of debug commands at an application programming interface;

within the application programming interface, formatting, in real time, the plurality of debug commands in a first programming language independent of the DUT for application to a test system, wherein the formatted debug commands comprise at least one instruction specifying a non-deterministic operation;

applying the formatted commands to the automatic test equipment; and

within the automatic test equipment, generating a plurality of instrument commands in accordance to the formatted commands and controlling one or more instruments to stimulate a device under test and measure responses of the device under test in accordance with the plurality of instrument commands and protocol information associated with a device under test, wherein the instrument commands specify at least one of levels and timing of a signal generated by the instruments, wherein

controlling the one or more instruments comprises generating commands in a second programming language configured to control the one or more instruments to generate or measure signals at the DUT.

12. The method of claim 11, wherein:

stimulating a device under test and measuring responses of the device under test are configured to be performed in accordance with a functionally correct working environment for the device under test.

13. The method of claim 11, wherein:

formatting the plurality of debug commands comprises generating a plurality of high level instrument commands.

14. The method of claim 11, wherein:

controlling one or more instruments comprises generating a binary test pattern based at least in part on high level instrument commands and the protocol information.

15. The method of claim 11, wherein:

controlling the one or more instruments within the automatic test equipment comprises operating a protocol aware engine or instrument engine within the automatic test equipment to generate signals to stimulate the device under test at times determined by responses from the device under test.

16. The method of claim 15, further comprising:

configuring the protocol aware engine or instrument engine based on protocol information associated with the device under test such that the debug commands are independent of protocols used by the device under test.

17. The method of claim 11, further comprising:

receiving at the interface an indication that execution of a first formatted debug command was completed.

18. The method of claim 17, wherein the first formatted debug command comprises an instruction specifying a non-deterministic operation by the device under test.

19. The method of claim 11, wherein:

the device under test comprises a processor core; and

the plurality of debug commands comprise a command to load a test program into the device under test through a JTAG interface or other control interface, the test program being formatted for execution by the processor core to control the processor core to perform test functions involving interaction with one or more other subsystems in the device under test.

20. The method of claim 19, wherein:

controlling the one or more instruments within the test system comprises controlling the one or more instruments to;

generate signals that control execution of a portion of the test program by the processor core; and

measure signals output by the device under test at times synchronized with execution of the portion of the test program.

21. A test apparatus comprising:

a plurality of instruments disposed within automatic test equipment, each of the instruments configured to generate and/or measure at least one signal for application to a device under test;

a tester control module within the automatic test equipment, the tester control module comprising an input, wherein the tester control module comprises a protocol aware engine configured to generate, in real time, control signals that control the plurality of instruments to generate and/or measure at least one non-deterministic signal for application to the device under test based on instrument commands received through the input, wherein the instrument commands specify at least one of levels and timing of a signal generated by the instruments; and

at least one processor configured to implement;

a debugger module, the debugger module comprising an interface, wherein the debugger module is configured to execute at least one debug tool in response to information received through the interface to generate debug commands; and

a translation module coupled between the debugger module and the tester control module, wherein the translation module is configured to;

receive a first set of debug commands from the debugger module;

generate, based on the first set, a second set of instrument commands;

apply the second set to the input of the tester control module in real time in relation to receipt of the first set of debug commands; and

convert information from the tester control module into a format of the debugger module indicating a result of applying the second set of debug commands.

22. The test apparatus of claim 21, wherein:

the tester control module is further configured to generate, in real time, control signals in accordance with a functionally correct working environment for the device under test.

23. The test apparatus of claim 21, wherein:

the at least one processor comprises at least a first processor and a second processor;

the first processor is configured to implement the debugger module;

the second processor is disposed within the automatic test equipment; and

the second processor is configured to implement the tester control module.

24. The test apparatus of claim 21, wherein:

the tester control module comprises at least one protocol aware engine or instrument engine.

25. The test apparatus of claim 21, wherein:

the tester control module is further configured to;

generate the control signals from the instrument commands received through the input in a plurality of protocols; and

receive a control signal selecting a protocol of the plurality of protocols.

26. The test apparatus of claim 21, wherein:

the debugger module is configured to generate debug commands in a format that is independent of a format of the instrument commands.