Method and apparatus of an input resistance of a passive mixer to broaden the input matching bandwidth of a common source/gate LNA

• US 9,960,948 B2
• Filed: 11/21/2016
• Issued: 05/01/2018
• Est. Priority Date: 12/06/2011
• Status: Active Grant

• Current Assignee: Tensorcom Inc
• Original Assignee: Tensorcom Inc
• Inventors: Soe, Zaw
• Primary Examiner(s): JACKSON, BLANE J
• Application Number:
  US15/357,566
• Publication Number:
  US 20170126464A1
• Time in Patent Office: 526 Days
• CPC Class Codes: H03D 7/125 with field effect transistors
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1466 Passive mixer arrangements
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/42 Modifications of amplifiers to extend the bandwidth
• CPC Class Codes: H03F 2200/108 A coil being added in the drain circuit of a FET amplifier stage, e.g. for noise reducing purposes
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2200/492 A coil being added in the source circuit of a transistor amplifier stage as degenerating element
• CPC Class Codes: H03F 2200/72 the amplifier stage being a common gate configuration MOSFET
• CPC Class Codes: H03F 2200/75 the amplifier stage being a common source configuration MOSFET
• CPC Class Codes: H03F 3/193 with field-effect devices H03F3/195 takes precedence
• CPC Class Codes: H03F 3/387 with semiconductor devices only
• CPC Class Codes: H03F 3/45071 with semiconductor devices only
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits

Abstract

A receiver comprises a Low Noise Amplifier (LNA) configured to amplify an input signal and a resonant circuit coupled to the LNA. A first switch couples current from the resonant circuit to a first capacitor integrating a first voltage, wherein the first switch is enabled with a clock signal. A second switch couples current from the resonant circuit to a second capacitor integrating a second voltage, wherein the second switch is enabled with an inverse clock signal. A differential amplifier comprises a positive input for receiving the first voltage and a negative input for receiving the second voltage in order to produce a sum and a difference frequency spectrum between a signal spectrum carried within the current and a frequency of the clock signal.

Claims

1. A method of operating a receiver, comprising:

amplifying an input signal in a Low Noise Amplifier (LNA) coupled to a resonant circuit;

coupling a switched capacitance circuit to the resonant circuit to reduce a quality factor of the resonant circuit comprising;

coupling current from the resonant circuit through a first switch to a first capacitor integrating a first voltage; and

coupling current from the resonant circuit through a second switch to a second capacitor integrating a second voltage;

enabling the first switch with a clock signal;

enabling the second switch with an inverse clock signal;

applying a first voltage to a positive input of a differential amplifier;

applying a second voltage to a negative input of the differential amplifier; and

providing a sum and a difference frequency spectrum between a signal spectrum carried within the current and a frequency of the clock signal.

2. The method of claim 1, wherein the LNA is configured in a cascode structure.

3. The method of claim 1, wherein the first switch and the second switch comprise a first mixer.

4. The method of claim 3, wherein energy from the resonant circuit powers the first mixer.

5. The method of claim 1, further comprising:

coupling the resonant circuit through a third switch to a third capacitor;

coupling the resonant circuit through a fourth switch to a fourth capacitor;

employing a quadrature clock signal to enable a third switch of a third capacitor coupled to a first input of a second differential amplifier;

employing a quadrature inverse clock signal to enable a fourth switch of a fourth capacitor coupled to a second input of the second differential amplifier; and

providing an output of the second differential amplifier to produce a quadrature sum frequency and a quadrature difference frequency spectrum between the signal spectrum and the quadrature clock signal.

6. The method of claim 5, wherein the third switch and the fourth switch comprise a second mixer.

7. The method of claim 5, wherein the LNA is coupled via a coupling capacitor to common nodes of switches in the first mixer and the second mixer.

8. The method of claim 7, further comprising providing for a voltage divider to provide DC-biasing for the common nodes.

9. The method of claim 5, wherein a switched capacitor circuit comprising at least one switch in the first mixer and the second mixer is configured to provide a load resistance in parallel with the resonant circuit, wherein the load resistance is configured to increase bandwidth of the LNA.

10. A receiver apparatus, comprising:

a Low Noise Amplifier (LNA) configured to amplify an input signal;

a resonant circuit coupled to the LNA;

a switched capacitance circuit configured to reduce a quality factor of the resonant circuit, the switched capacitance circuit comprising;

a first switch coupling current from the resonant circuit to a first capacitor integrating a first voltage, the first switch enabled with a clock signal; and

a second switch coupling current from the resonant circuit to a second capacitor integrating a second voltage, the second switch enabled with an inverse clock signal; and

a differential amplifier comprising a positive input for receiving the first voltage and a negative input for receiving the second voltage, the differential amplifier providing a sum and a difference frequency spectrum between a signal spectrum carried within the current and a frequency of the clock signal.

11. The receiver apparatus of claim 10, wherein the LNA is configured in a cascode structure.

12. The receiver apparatus of claim 10, wherein the first switch and the second switch comprise a first mixer.

13. The receiver apparatus of claim 10, wherein energy from the resonant circuit powers the first mixer.

14. The receiver apparatus of claim 10, further comprising:

a third switch coupling the resonant circuit to a third capacitor, the third switch enabled with a quadrature clock signal;

a fourth switch coupling the resonant circuit to a fourth capacitor, the fourth switch enabled with a quadrature inverse clock signal; and

a second differential amplifier comprising a first input coupled to the third capacitor a second input coupled to the fourth capacitor, and an output that produces a quadrature sum frequency and a quadrature difference frequency spectrum between the signal spectrum and the quadrature clock signal.

15. The receiver apparatus of claim 14, wherein the third switch and the fourth switch comprise a second mixer.

16. The receiver apparatus of claim 14, wherein the LNA is coupled via a coupling capacitor to common nodes of switches in the first mixer and the second mixer.

17. The receiver apparatus of claim 16, further comprising a voltage divider configured to provide DC-biasing to the common nodes.

18. The receiver apparatus of claim 14, wherein a switched capacitor circuit comprising at least one switch in the first mixer and the second mixer is configured to provide a load resistance in parallel with the resonant circuit, wherein the load resistance is configured to increase bandwidth of the LNA.