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Vector operations with operand base system conversion and re-conversion

  • US 9,965,276 B2
  • Filed: 04/28/2016
  • Issued: 05/08/2018
  • Est. Priority Date: 06/29/2012
  • Status: Active Grant
First Claim
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1. A method comprising:

  • decoding a single instruction with a hardware decoder of a hardware processor; and

    executing the single instruction with a hardware execution unit of the hardware processor by;

    receiving a vector element of a first input vector and a vector element of a second input vector expressed in a first base system;

    converting the vector element of the first input vector and the vector element of the second input vector into a second lower base system to form a converted vector element of the first input vector and a converted vector element of the second input vector;

    performing an operation on the converted vector element of the first input vector and the converted vector element of the second input vector to form a result;

    accumulating in a register a portion of the result with a portion of a result of a prior operation expressed in the second lower base system; and

    converting contents of the register into the first base system.

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