Power supply failover system and method

• US 9,965,365 B2
• Filed: 01/22/2016
• Issued: 05/08/2018
• Est. Priority Date: 12/31/2013
• Status: Active Grant

• Current Assignee: Lite-On Incorporated (Lite-On Technology Corporation)
• Original Assignee: Lite-On Incorporated (Lite-On Technology Corporation)
• Inventors: Lee, Victor K. J., Liu, Yung Hsiang, Liang, Wei Kang, Wang, Yu Kai, Chiang, Chih Hung
• Primary Examiner(s): Manoskey, Joseph D
• Application Number:
  US15/004,585
• Publication Number:
  US 20160154716A1
• Time in Patent Office: 837 Days
• Field of Search: 714 14
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30

Abstract

A power supply failover system/method providing uninterruptable power to protected load devices (PLD) is disclosed. The system includes a failover switch controller (FSC) with inputs from an AC I/V monitor (AIV), AC cycle counter (ACC), failover switch timer (FST), and overcurrent protection timer (OPT). The FSC utilizes these inputs to control failsafe switching of a bypass phase switch (BPS) and AC phase switch (ACS) to the PLD when power from the APS is determined to be good by the AIV. When power from the APS is determined to be compromised by the AIV, the FPS disables the ACS/BPS and enables a DC switch (DCS) and battery isolation switch (BIS) to connect a DC source to the PLD after a time period determined by the FST. APS/DCS overcurrent protection is limited by OPT intervals allowing a smooth transition between the APS to DCS during power failover/failback.

Claims

1. A power supply failover system comprising:

(a) failover switch controller (FSC);

(b) AC current/voltage (I/V) monitor (AIV);

(c) AC cycle counter (ACC);

(d) failover switch timer (FST);

(e) overcurrent protection timer (OPT);

(f) manual bypass switch (MBS);

(g) bypass phase switch (BPS);

(h) bypass relay switch (BRS);

(i) AC phase switch (ACS);

(j) AC relay (ACR);

(k) DC switch (DCS);

(l) battery isolation switch (BIS);

(m) AC power source (APS);

(n) AC/DC battery charger (ABC);

(o) DC battery power source (DBS);

(p) battery overcurrent protection device (BOP); and

(q) AC overcurrent protection device (AOP);

wherein;

said APS and said ABC are connected in series between a reference neutral connection (RNC) and an AC power node (APN);

said MBS is connected in series with a protected load device (PLD) between said APS and said RNC;

said series connection between said MBS and said PLD forming a protected load node (PLN) at the connection between said MBS and said PLD;

said ACR is connected in series with said ACS between said APN and said PLN;

said BRS is connected in series with said BPS between said APN and said PLN;

said ABC comprises an AC input and a DC output;

said AOP is connected in series between said APN and said ABC AC input;

said DBC and said BOP are connected in series between said RNC and said ABC DC output;

said BIS and said DCS are connected in series between said ABC DC output and said PLN;

said AOP is configured to provide configurable overcurrent protection for said APS;

said AOP is configured to provide configurable overcurrent protection for said DBS;

said AIV is configured to monitor voltage supplied by said APS and current supplied by said APS;

said ACC is configured to count voltage cycles supplied by said APS;

said FST is configured as a resettable timer undercontrol of said FSC;

said OPT is configured as a resettable timer under control of said FSC;

said FSC inhibits operation of said AOP and said BOP based on the timer value of said OPT;

said FSC initiates operation of said OPT during transitions of said ACS, said BPS, said BIS, and said DCS; and

said FSC is configured to read said Aft, said ACC, said FST, and said OPT to determine the operation of said ACR, said ACS, said BRS, said BPS, said BIS, and said DCS to supply uninterrupted power to said PLD from either said APS or said DBS.

2. The power supply failover system of claim 1 wherein said PLD further comprises an AC+DC power supply.

3. The power supply failover system of claim 1 wherein said DCS comprises an IGBT.

4. The power supply failover system of claim 1 wherein said BIS comprises a SCR in parallel with a relay.

5. The power supply failover system of claim 1 wherein said ACS comprises two SCRs connected in an inverted parallel configuration.

6. The power supply failover system of claim 1 wherein said BPS comprises two SCRs connected in an inverted parallel configuration.

7. The power supply failover system of claim 1 wherein said ABC further comprises a power factor correction (PFC) circuit electrically coupled to a phase shift full bridge converter (FSFB) battery charging circuit.

8. The power supply failover system of claim 1 wherein said FSC is configured to transition between supplying said ACS to said PLD and supplying said DCS to said PLD after a delay of one-half AC cycle as counted by said ACC.

9. The power supply failover system of claim 1 wherein said FSC is configured to determine if a shorting fault exists in circuitry within said ACS, said BPS, said BIS, or said DCS before initiating a transition between power from said APS and said DBS, and if said shorting fault is detected, entering a STANDBY mode in which transitions between power supplied from said APS and power supplied from said DBS are inhibited.

10. The power supply failover system of claim 1 wherein an additional AC master breaker (ACB) and manual bypass switch (MBS) are inserted in parallel between said APS and said RNC and serve to enable full isolation between said APS from said RNC.

11. A power supply failover method, said method operating in conjunction with a power supply failover system, said system comprising:

(a) failover switch controller (FSC);

(b) AC current/voltage (I/V) monitor (AIV);

(c) AC cycle counter (ACC);

(d) failover switch timer (FST);

(e) overcurrent protection timer (OPT);

(f) manual bypass switch (MBS);

(g) bypass phase switch (BPS);

(h) bypass relay switch (BRS);

(i) AC phase switch (ACS);

(j) AC relay (ACR);

(k) DC switch (DCS);

(l) battery isolation switch (BIS);

(m) AC power source (APS);

(n) AC/DC battery charger (ABC);

(o) DC battery power source (DBS);

(p) battery overcurrent protection device (BOP); and

(q) AC overcurrent protection device (AOP);

wherein;

said APS and said ABC are connected in series between a reference neutral connection (RNC) and an AC power node (APN);

said MBS is connected in series with a protected load device (PLD) between said APS and said RNC;

said series connection between said MBS and said PLD forming a protected load node (PLN) at the connection between said MBS and said PLD;

said ACR is connected in series with said ACS between said APN and said PLN;

said BRS is connected in series with said BPS between said APN and said PLN;

said ABC comprises an AC input and a DC output;

said AOP is connected in series between said APN and said ABC AC input;

said DBC and said BOP are connected in series between said RNC and said ABC DC output;

said BIS and said DCS are connected in series between said ABC DC output and said PLN;

said AOP is configured to provide configurable overcurrent protection for said APS;

said AOP is configured to provide configurable overcurrent protection for said DBS;

said AIV is configured to monitor voltage supplied by said APS and current supplied by said APS;

said ACC is configured to count voltage cycles supplied by said APS;

said FST is configured as a resettable timer under control of said FSC;

said OPT is configured as a resettable timer under control of said FSC;

said FSC inhibits operation of said AOP and said BOP based on the timer value of said OPT;

said FSC initiates operation of said OPT during transitions of said ACS, said BPS, said BIS, and said DCS; and

said FSC is configured to read said AIV, said ACC, said FST, and said OPT to determine the operation of said ACR, said ACS, said BRS, said BPS, said BIS, and said DCS to supply uninterrupted power to said PLD from either said APS or said DBS;

wherein said method comprises the steps of;

(1) With said FSC, initially configuring said power supply failover system for AC operation by enabling said ACR and said ACS to electrically couple said APS to said PLD;

(2) With said FSC, monitoring a voltage from said APS using said AIV;

(3) With said FCS, determining if said APS voltage is greater than or equal to 264V, and if so, proceeding to step (6);

(4) With said FCS, determining if the APS voltage is less than or equal to 180V, and if so, proceeding to step (6);

(5) With said FCS, determining if AC operation is currently in effect, and if so, proceeding to step (2), otherwise proceeding to step (7);

(6) With said FCS, activating a power failover method to switch between AC power from said APS and DC backup power from said DBS by deactivating said ACR and said ACS and activating said BIS and said DCS and proceeding to step (2); and

(7) With said KS, activating a power fallback method to switch between DC backup power from said DBS and AC power from said APS by deactivating said BIS and said DCS and activating said ACR and said ACS and proceeding to step (1).

12. The power supply failover method of claim 11 wherein said PLD further comprises an AC+DC power supply.

13. The power supply failover method of claim 11 wherein said DCS comprises an IGBT.

14. The power supply failover method of claim 11 wherein said BIS comprises a SCR in parallel with a relay.

15. The power supply failover method of claim 11 wherein said ACS comprises two SCRs connected in an inverted parallel configuration.

16. The power supply failover method of claim 11 wherein said BPS comprises two SCRs connected in an inverted parallel configuration.

17. The power supply failover method of claim 11 wherein said ABC further comprises a power factor correction (PFC) circuit electrically coupled to a phase shift full bridge converter (FSFB) battery charging circuit.

18. The power supply failover method of claim 11 wherein said FSC is configured to transition between supplying said ACS to said PLD and supplying said DCS to said PLD after a delay of one-half AC cycle as counted by said ACC.

19. The power supply failover method of claim 11 wherein said FSC is configured to determine if a shorting fault exists in circuitry within said ACS, said BPS, said BIS, or said DCS before initiating a transition between power from said APS and said DBS, and if said shorting fault is detected, entering a STANDBY mode in which transitions between power supplied from said APS and power supplied from said DBS are inhibited.

20. The power supply failover method of claim 11 wherein an additional AC master breaker (ACB) and manual bypass switch (MBS) are inserted in parallel between said APS and said RNC and serve to enable full isolation between said APS from said RNC.

21. A tangible non-transitory computer usable medium having computer-readable program code means comprising a power supply failover method, said method operating in conjunction with a power supply failover system, said system comprising:

(a) failover switch controller (FSC);

(b) AC current/voltage (I/V) monitor (AIV);

(c) AC cycle counter (ACC);

(d) failover switch timer (FST);

(e) overcurrent protection timer (OPT);

(f) manual bypass switch (MBS);

(g) bypass phase switch (BPS);

(h) bypass relay switch (BRS);

(i) AC phase switch (ACS);

(j) AC relay (ACR);

(k) DC switch (DCS);

(l) battery isolation switch (BIS);

(m) AC power source (APS);

(n) AC/DC battery charger (ABC);

(o) DC battery power source (DBS);

(p) battery overcurrent protection device (BOP); and

(q) AC overcurrent protection device (AOP);

wherein;

said APS and said ABC are connected in series between a reference neutral connection (RNC) and an AC power node (APN);

said MBS is connected in series with a protected load device (PLD) between said APS and said RNC;

said series connection between said MBS and said PLD forming a protected load node (PLN) at the connection between said MBS and said PLD;

said ACR is connected in series with said ACS between said APN and said PLN;

said BRS is connected in series with said BPS between said APN and said PLN;

said ABC comprises an AC input and a DC output;

said AOP is connected in series between said APN and said ABC AC input;

said DBC and said BOP are connected in series between said RNC and said ABC DC output;

said BIS and said DCS are connected in series between said ABC DC output and said PLN;

said AOP is configured to provide configurable overcurrent protection for said APS;

said AOP is configured to provide configurable overcurrent protection for said DBS;

said AIV is configured to monitor voltage supplied by said APS and current supplied by said APS;

said ACC is configured to count voltage cycles supplied by said APS;

said FST is configured as a resettable timer under control of said FSC;

said OPT is configured as a resettable timer under control of said FSC;

said FSC inhibits operation of said AOP and said BOP based on the timer value of said OPT;

said FSC initiates operation of said OPT during transitions of said ACS, said BPS, said BIS, and said DCS; and

said FSC is configured to read said AIV, said ACC, said FST, and said OPT to determine the operation of said ACR, said ACS, said BRS, said BPS, said BIS, and said DCS to supply uninterrupted power to said PLD from either said APS or said DBS;

wherein said method comprises the steps of;

(1) With said FSC, initially configuring said power supply failover system for AC operation by enabling said ACR and said ACS to electrically couple said APS to said PLD;

(2) With said FSC, monitoring a voltage from said APS using said AIV;

(3) With said FCS, determining if said APS voltage is greater than or equal to 264V, and if so, proceeding to step (6);

(4) With said FCS, determining if the APS voltage is less than or equal to 180V, and if so, proceeding to step (6);

(5) With said FCS, determining if AC operation is currently in effect, and if so, proceeding to step (2), otherwise proceeding to step (7);

(6) With said FCS, activating a power failover method to switch between AC power from said APS and DC backup power from said DBS by deactivating said ACR and said ACS and activating said BIS and said DCS and proceeding to step (2); and

(7) With said KS, activating a power fallback method to switch between DC backup power from said DBS and AC power from said APS by deactivating said BIS and said DCS and activating said ACR and said ACS and proceeding to step (1).

22. The computer usable medium of claim 21 wherein said PLD further comprises an AC+DC power supply.

23. The computer usable medium of claim 21 wherein said DCS comprises an IGBT.

24. The computer usable medium of claim 21 wherein said BIS comprises a SCR in parallel with a relay.

25. The computer usable medium of claim 21 wherein said ACS comprises two SCRs connected in an inverted parallel configuration.

26. The computer usable medium of claim 21 wherein said BPS comprises two SCRs connected in an inverted parallel configuration.

27. The computer usable medium of claim 21 wherein said ABC further comprises a power factor correction (PFC) circuit electrically coupled to a phase shift full bridge converter (FSFB) battery charging circuit.

28. The computer usable medium of claim 21 wherein said FSC is configured to transition between supplying said ACS to said PLD and supplying said DCS to said PLD after a delay of one-half AC cycle as counted by said ACC.

29. The computer usable medium of claim 21 wherein said FSC is configured to determine if a shorting fault exists in circuitry within said ACS, said BPS, said BIS, or said DCS before initiating a transition between power from said APS and said DBS, and if said shorting fault is detected, entering a STANDBY mode in which transitions between power supplied from said APS and power supplied from said DBS are inhibited.

30. The computer usable medium of claim 21 wherein an additional AC master breaker (ACB) and manual bypass switch (MBS) are inserted in parallel between said APS and said RNC and serve to enable full isolation between said APS from said RNC.