Semiconductor device and semiconductor package comprising the same
First Claim
1. A semiconductor device, comprising:
- a first terminal electrically connected to a first semiconductor chip;
a second terminal electrically connected to a second semiconductor chip;
a first signal line configured to electrically connect the first terminal and the second terminal;
a third terminal configured to electrically connect to a tester, the tester configured to monitor a signal transmitted between the first semiconductor chip and the second semiconductor chip;
a second signal line configured to electrically connect the third terminal and a fourth terminal, the fourth terminal configured to receive a reference voltage;
a first resistor electrically connected between a first node and a second node, the first node being associated with the first signal line and the second node being associated with the second signal line;
such that a first end of the first resistor is connected to the first node between the first semiconductor chip and the second semiconductor chip and a second end of the first resistor is connected to the tester via the second node; and
a second resistor electrically connected between the second node and the fourth terminal such that a first end of the second resistor is directly connected to the second node and a second end of the second resistor is connected to the fourth terminal.
1 Assignment
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Accused Products
Abstract
A semiconductor device may include a first terminal electrically connected to a first semiconductor chip, a second terminal electrically connected to a second semiconductor chip, which is different from the first semiconductor chip, a first signal line electrically connecting the first terminal and the second terminal and including a first node, a third terminal connected to a tester monitoring a signal transmitted between the first semiconductor chip and the second semiconductor chip, a fourth terminal applied a reference voltage, a second signal line electrically connecting the third terminal and the fourth terminal and including a second node, a first resistor connected between the first node and the second node and a second resistor directly connected to the second node different from the first resistor.
18 Citations
20 Claims
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1. A semiconductor device, comprising:
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a first terminal electrically connected to a first semiconductor chip; a second terminal electrically connected to a second semiconductor chip; a first signal line configured to electrically connect the first terminal and the second terminal; a third terminal configured to electrically connect to a tester, the tester configured to monitor a signal transmitted between the first semiconductor chip and the second semiconductor chip; a second signal line configured to electrically connect the third terminal and a fourth terminal, the fourth terminal configured to receive a reference voltage; a first resistor electrically connected between a first node and a second node, the first node being associated with the first signal line and the second node being associated with the second signal line;
such that a first end of the first resistor is connected to the first node between the first semiconductor chip and the second semiconductor chip and a second end of the first resistor is connected to the tester via the second node; anda second resistor electrically connected between the second node and the fourth terminal such that a first end of the second resistor is directly connected to the second node and a second end of the second resistor is connected to the fourth terminal. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor package, comprising:
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a circuit board including a reference voltage terminal configured to receive a reference voltage; an interposer electrically connected to the circuit board, the interposer including a tester terminal; and a first semiconductor chip on the interposer, the first semiconductor chip configured to electrically connect to the circuit board and the interposer, wherein the interposer includes, a first wire configured to electrically connect the circuit board and the first semiconductor chip, a second wire configured to electrically connect to the first wire, the second wire including a first resistor such that a first end of the first resistor is connected between the first semiconductor chip and the circuit board and a second end of the first resistor is connected to the tester terminal, and a third wire configured to electrically connect the tester terminal and the reference voltage terminal, the third wire including a second resistor such that a first end of the second resistor is directly connected to the tester terminal and a second end of the second resistor is connected to the reference voltage terminal. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A semiconductor device comprising:
an interposer configured to electrically connect a testing device to a first signal path between a first semiconductor chip and a second semiconductor chip, the testing device configured to monitor a signal transmitted via the first signal path between the first semiconductor chip and the second semiconductor chip, the interposer including, a first resistor configured to electrically connect a first node and a second node, the first node being a node on the first signal path between the first semiconductor chip and the second semiconductor chip and the second node being a node on a second signal path between the first node and the testing device such that a first end of the resistor is connected to the first node between the first semiconductor chip and the second semiconductor chip and a second end of the first resistor is connected to the testing device via the second node, and a second resistor configured to electrical connect a reference terminal and the second node such that a first end of the second resistor is directly connected to the second node and a second end of the second resistor is connected to the reference terminal, the reference terminal configured to receive a reference voltage. - View Dependent Claims (17, 18, 19, 20)
Specification