Vertical semiconductor devices including superlattice punch through stop layer and related methods
First Claim
1. A semiconductor device comprising:
- a substrate;
a plurality of fins spaced apart on said substrate, each of said fins comprisinga lower semiconductor fin portion extending vertically upward from the substrate,a plurality of spaced apart superlattice punch-through stop layers on the lower fin portion, each superlattice punch-through stop layer including a plurality of stacked groups of layers, each group of layers of the superlattice punch-through stop layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,a respective bulk semiconductor layer between adjacent superlattice punch-through stop layers, andan upper semiconductor fin portion on an uppermost one of said superlattice punch-through stop layers and extending vertically upward therefrom;
source and drain regions at opposing ends of the fins; and
a gate overlying the fins.
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Accused Products
Abstract
A semiconductor device may include a substrate, and a plurality of fins spaced apart on the substrate. Each of the fins may include a lower semiconductor fin portion extending vertically upward from the substrate, and at least one superlattice punch-through layer on the lower fin portion. The superlattice punch-through layer may include a plurality of stacked groups of layers, with each group of layers of the superlattice punch-through layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Each fin may also include an upper semiconductor fin portion on the at least one superlattice punch-through layer and extending vertically upward therefrom. The semiconductor device may also include source and drain regions at opposing ends of the fins, and a gate overlying the fins.
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Citations
12 Claims
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1. A semiconductor device comprising:
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a substrate; a plurality of fins spaced apart on said substrate, each of said fins comprising a lower semiconductor fin portion extending vertically upward from the substrate, a plurality of spaced apart superlattice punch-through stop layers on the lower fin portion, each superlattice punch-through stop layer including a plurality of stacked groups of layers, each group of layers of the superlattice punch-through stop layer comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions, a respective bulk semiconductor layer between adjacent superlattice punch-through stop layers, and an upper semiconductor fin portion on an uppermost one of said superlattice punch-through stop layers and extending vertically upward therefrom; source and drain regions at opposing ends of the fins; and a gate overlying the fins. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device comprising:
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a substrate; a plurality of fins spaced apart on said substrate, each of said fins comprising a lower semiconductor fin portion extending vertically upward from the substrate, a plurality of spaced apart superlattice punch-through stop layers on the lower fin portion, each superlattice punch-through stop layer including a plurality of stacked groups of layers, each group of layers of the superlattice punch-through stop layer comprising a plurality of stacked base silicon monolayers defining a base silicon portion and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions, a respective bulk semiconductor layer between adjacent superlattice punch-through stop layers, and an upper semiconductor fin portion on an uppermost one of said superlattice punch-through stop layers and extending vertically upward therefrom; source and drain regions at opposing ends of the fins; and a gate overlying the fins. - View Dependent Claims (10)
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11. A semiconductor device comprising:
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a substrate; a plurality of fins spaced apart on said substrate, each of said fins comprising a lower semiconductor fin portion extending vertically upward from the substrate, a plurality of spaced apart superlattice punch-through stop layers on the lower fin portion, each superlattice punch-through stop layer including a plurality of stacked groups of layers, each group of layers of the superlattice punch-through stop layer comprising a plurality of stacked base germanium monolayers defining a base germanium portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base germanium portions, with the at least one non-semiconductor monolayer comprising a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, and carbon-oxygen, a respective bulk semiconductor layer between adjacent superlattice punch-through stop layers, and an upper semiconductor fin portion on an uppermost one of said superlattice punch-through stop layers and extending vertically upward therefrom; source and drain regions at opposing ends of the fins; and a gate overlying the fins. - View Dependent Claims (12)
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Specification