Automatic sub-millisecond clock synchronization

• US 9,973,036 B2
• Filed: 12/31/2013
• Issued: 05/15/2018
• Est. Priority Date: 12/31/2013
• Status: Active Grant

• Current Assignee: Schneider Electric IT Corporation (Schneider Electric SE)
• Original Assignee: Schneider Electric IT Corporation (Schneider Electric SE)
• Inventors: Linder, Stephen Paul
• Primary Examiner(s): Nguyen, Tung X
• Application Number:
  US15/108,868
• Publication Number:
  US 20160329745A1
• Time in Patent Office: 1,596 Days
• Field of Search: 324140 R
• CPC Class Codes: G01R 19/2513 Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging
• CPC Class Codes: H02J 13/00016 using a wired telecommunication network or a data transmission bus
• CPC Class Codes: Y02E 60/00 Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
• CPC Class Codes: Y04S 40/124 using wired telecommunication networks or data transmission busses

Abstract

According to one aspect, embodiments of the invention provide a system for monitoring a plurality of circuit branches coupled to an input line, the system comprising a communication bus, a controller having a primary clock with a first clock value and configured to sample voltage on the input line based on the first clock value, a plurality of sensor circuits, each sensor circuit having a secondary clock with a second clock value and configured to sample current in the at least one of the plurality of circuit branches based on the second clock value, and wherein the controller is further configured to initiate, via the communication bus, synchronization of at least one secondary clock and the primary clock, and to synchronize, via the communication bus, the at least one secondary clock and the primary clock to account for transmission latency in the communication bus.

Claims

1. A system for monitoring a plurality of circuit branches coupled to an input line, the system comprising:

a communication bus;

a controller having a primary clock with a first clock value, the controller configured to be coupled to the communication bus and the input line and further configured to sample voltage on the input line based on the first clock value;

a plurality of sensor circuits, each sensor circuit having a secondary clock with a second clock value and each sensor circuit configured to be coupled to the communication bus and at least one of the plurality of circuit branches, wherein each sensor circuit is further configured to sample current in the at least one of the plurality of circuit branches based on the second clock value; and

wherein the controller is further configured to initiate, via the communication bus, synchronization of at least one secondary clock and the primary clock, and to synchronize, via the communication bus, the at least one secondary clock and the primary clock to account for transmission latency in the communication bus,

wherein in synchronizing the at least one secondary clock and the primary clock, the controller is further configured to;

calculate at least one Return Trip Time (RTT) from the controller to at least one of the plurality of sensor circuits having the at least one secondary clock; and

transmit at least one synchronization signal from the controller to the at least one of the plurality of sensor circuits to adjust the second clock value of the at least one secondary clock based on the at least one RTT.

2. The system of claim 1, wherein the controller is further configured to utilize a multi-drop master-slave communication protocol to communicate with the plurality of sensor circuits via the communication bus.

3. The system of claim 1, wherein in initiating synchronization of the at least one secondary clock and the primary clock, the controller is further configured to transmit a measurement signal to the at least one of the plurality of sensor circuits having the at least one secondary clock, and to start a timer having an elapsed time value upon transmitting the measurement signal.

4. The system of claim 3, wherein the at least one of the plurality of sensor circuits is further configured to receive the measurement signal and transmit a response to the measurement signal to the controller.

5. The system of claim 4, wherein the at least one of the plurality of sensor circuits is further configured to adjust the second clock value of the at least one secondary clock based on the measurement signal.

6. The system of claim 4, wherein in calculating the at least one RTT from the controller to the at least one of the plurality of sensor circuits, the controller is further configured to receive the response to the measurement signal from the at least one of the plurality of sensor circuits, to stop the timer in response to receiving the response to the measurement signal, and to calculate the at least one RTT based on the elapsed time value of the timer.

7. The system of claim 6, wherein the controller is further configured to calculate a representative RTT based on the at least one RTT.

8. The system of claim 7, wherein the representative RTT is one of a median RTT, mean RTT, and maximum RTT.

9. The system of claim 7, wherein in transmitting the at least one synchronization signal from the controller to the at least one of the plurality of sensor circuits, the controller is further configured to transmit a first synchronization signal based on the representative RTT to the at least one of the plurality of sensor circuits, and wherein the at least one of the plurality of sensor circuits is further configured to adjust the second clock value of the at least one secondary clock based on the first synchronization signal.

10. The system of claim 9, wherein the at least one of the plurality of sensor circuits is further configured to adjust a millisecond counter of the at least one secondary clock based on the first synchronization signal.

11. The system of claim 9, wherein the controller is further configured to transmit a second synchronization signal based on the representative RTT to the at least one of the plurality of sensor circuits, and wherein the at least one of the plurality of sensor circuits is further configured to adjust the second clock value based on the second synchronization signal.

12. The system of claim 11, wherein the at least one of the plurality of sensor circuits is further configured to adjust a microsecond counter of the at least one secondary clock based on the second synchronization signal.

13. The system of claim 1, wherein the controller is further configured to synchronize, via the communication bus, current sampling performed by the plurality of sensor circuits with the voltage sampling performed by the controller.

14. A method for monitoring a plurality of circuit branches coupled to a power line, the method comprising:

coupling a controller to the communication bus and to the power line, the controller having a primary clock with a first clock value;

coupling a sensor circuit to each one of the plurality of circuit branches and to a communication bus, each sensor circuit having a secondary clock with a second clock value;

sampling, with at least one of the sensor circuits, current in at least one of the plurality of circuit branches based on the second clock value;

sampling, with the controller, voltage on the power line based on the first clock value; and

synchronizing, with the controller via the communication bus, the at least one secondary clock and the primary clock to account for transmission latency in the communication bus,

wherein synchronizing the at least one secondary clock and the primary clock includes;

calculating at least one RTT from the controller to at least one sensor circuit having the at least one secondary clock; and

transmitting at least one synchronization signal from the controller to the at least one sensor circuit to adjust the second clock value of the secondary clock of the at least one sensor circuit based on the at least one RTT.

15. The method of claim 14, wherein calculating at least one RTT includes:

transmitting a measurement signal from the controller to the at least one sensor circuit;

in response to transmitting the measurement signal, starting a timer of the controller having an elapsed time value;

receiving, with the at least one sensor circuit, the measurement signal;

transmitting, in response to receiving the measurement signal, a response to the measurement signal from the at least one sensor circuit to the controller;

receiving, with the controller, the response to the measurement signal;

stopping, in response to receiving the response to the measurement signal, the timer of the controller; and

calculating the at least one RTT based on the elapsed time value of the timer.

16. The method of claim 15, further comprising calculating a representative RTT based on a plurality of RTT calculations, and wherein transmitting at least one synchronization signal from the controller to the at least one sensor circuit includes transmitting at least one synchronization signal from the controller to the at least one sensor circuit to adjust the second clock value of the at least one sensor circuit based on the representative RTT.

17. The method of claim 14, further comprising synchronizing, with the controller via the communication bus, current sampling performed by the plurality of sensor circuits with the voltage sampling performed by the controller.

18. The method of claim 14, wherein transmitting at least one synchronization signal from the controller to the at least one sensor circuit to adjust the second clock value of the at least one sensor circuit based on the at least one RTT includes utilizing a multi-drop master-slave communication protocol to transmit the at least one synchronization signal from the controller to the at least one sensor circuit.

19. A system for monitoring a plurality of circuit branches coupled to an input line, the system comprising:

a communication bus;

a controller having a primary clock having a first clock value, the controller configured to be coupled to the communication bus and the input line and further configured to sample voltage on the input line based on the first clock value;

a plurality of sensor circuits, each sensor circuit having a secondary clock with a second clock value and each sensor circuit configured to be coupled to the communication bus and at least one of the plurality of circuit branches, wherein each sensor circuit is further configured to sample current in the at least one of the plurality of circuit branches based on the second clock value; and

means for calculating at least one RTT from the controller to at least one of the plurality of sensor circuits having the at least one secondary clock, and for synchronizing, with the controller via the communication bus, the secondary clock of the at least one of the plurality of sensor circuits and the primary clock of the controller to within 0.1 millisecond based on the at least one RTT.