Amplifier dynamic bias adjustment for envelope tracking
First Claim
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1. A circuital arrangement comprising:
- an amplifier comprising;
stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors;
an input port operatively connected to a gate terminal of an input transistor of the stacked transistors configured to receive a radio frequency (RF) signal;
an output port operatively connected to an output transistor of the stacked transistors configured to output an amplified version of the RF signal; and
a reference terminal operatively coupling the input transistor to a reference potential, wherein the stacked transistors comprise a first subset and a second subset of transistors operatively arranged in series;
a) the first subset comprising the input transistor operatively connected between the reference potential at the reference terminal and the second subset; and
b) the second subset comprises;
i) one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor; and
ii) one or more gate capacitors, each gate capacitor of the one or more gate capacitors connected between a respective gate terminal of each transistor of the one or more transistors of the second subset and the reference potential, wherein the each gate capacitor is configured to allow a gate voltage at the respective gate terminal to vary along with a radio frequency (RF) voltage at a drain of the each transistor.
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Abstract
An envelope tracking amplifier having stacked transistors is presented. The envelope tracking amplifier uses dynamic bias voltages at one or more gates of the stacked transistors in addition to a dynamic bias voltage at a drain of a transistor.
75 Citations
45 Claims
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1. A circuital arrangement comprising:
an amplifier comprising; stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors; an input port operatively connected to a gate terminal of an input transistor of the stacked transistors configured to receive a radio frequency (RF) signal; an output port operatively connected to an output transistor of the stacked transistors configured to output an amplified version of the RF signal; and a reference terminal operatively coupling the input transistor to a reference potential, wherein the stacked transistors comprise a first subset and a second subset of transistors operatively arranged in series; a) the first subset comprising the input transistor operatively connected between the reference potential at the reference terminal and the second subset; and b) the second subset comprises; i) one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor; and ii) one or more gate capacitors, each gate capacitor of the one or more gate capacitors connected between a respective gate terminal of each transistor of the one or more transistors of the second subset and the reference potential, wherein the each gate capacitor is configured to allow a gate voltage at the respective gate terminal to vary along with a radio frequency (RF) voltage at a drain of the each transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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40. A method of amplifying a radio frequency (RF) signal in a circuital arrangement, the method comprising:
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providing an amplifier comprising stacked transistors in a cascode configuration; connecting, for each transistor of the stacked transistors with the exception of an input transistor of the stacked transistors, gate capacitor between a gate terminal of the each transistor and a reference potential; adapting the circuital arrangement to operatively connect a plurality of bias supplies to a plurality of gate terminals of the stacked transistors and to a drain terminal of an output transistor of the stacked transistors; applying an input RF signal to an input port of the circuital arrangement operatively connected to the input transistor of the stacked transistors; varying a bias supply of the plurality of bias supplies operatively connected to the drain of the output transistor, and impressing a desired amplification on the input RF signal to obtain an amplified output RF signal by varying at least one bias supply of the plurality of bias supplies operatively connected to a gate terminal of one transistor of the stacked transistors, wherein each gate capacitor is configured to allow a voltage at a gate of a corresponding transistor to vary along with an RF voltage at a drain of the corresponding transistor. - View Dependent Claims (41, 42, 43)
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44. A circuital arrangement comprising:
an amplifier comprising; stacked transistors having a plurality of gate terminals configured to operatively provide a plurality of dynamic bias voltages or currents to the stacked transistors; a variable voltage or current source operatively coupled to the stacked transistors, the variable voltage or current source comprising a DC/DC converter; an input port operatively connected to a gate terminal of an input transistor of the stacked transistors configured to receive a radio frequency (RF) signal; an output port operatively connected to an output transistor of the stacked transistors configured to output an amplified version of the RF signal; and a reference terminal operatively coupling the input transistor to a reference potential, wherein the stacked transistors comprise a first subset and a second subset of transistors operatively arranged in series, wherein; a) the first subset comprises the input transistor operatively connected between the reference potential at the reference terminal and the second subset; and b) the second subset comprises; i) one or more transistors operatively connected in series with each other, at least one transistor of the one or more transistors being the output transistor, the second subset operatively connected between the first subset and a variable output supply bias voltage or current provided to a drain terminal of the output transistor; and ii) one or more gate capacitors connected between gate terminals of the one or more transistors of the second subset and the reference potential, wherein each gate capacitor of the one or more gate capacitors is configured to allow a gate voltage at a gate terminal of a transistor of the one or more transistors of the second subset to vary along with a radio frequency (RF) voltage at a drain of the transistor, and c) the dynamic bias voltages or currents, and the variable output supply bias voltage or current, are operatively generated from the variable voltage or current source.
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45. A method of amplifying a radio frequency (RF) signal in a circuital arrangement, the method comprising:
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providing an amplifier comprising stacked transistors in a cascode configuration; connecting, for all transistors of the stacked transistors with the exception of an input transistor of the stacked transistors, gate capacitors between gate terminals of corresponding transistors of the stacked transistors and a reference potential; adapting the circuital arrangement to operatively connect a plurality of bias supplies to a plurality of gate terminals of the stacked transistors and to a drain terminal of an output transistor of the stacked transistors; applying an input RF signal to an input port of the circuital arrangement operatively connected to the input transistor of the stacked transistors; varying, by way of a variable voltage or current source comprising a DC/DC converter, a bias supply of the plurality of bias supplies operatively connected to the drain of the output transistor, and impressing a desired amplification on the input RF signal to obtain an amplified output RF signal by varying, by way of the variable voltage or current source, at least one bias supply of the plurality of bias supplies operatively connected to a gate terminal of one transistor of the stacked transistors, wherein each of the gate capacitors is configured to allow a voltage at a gate of a corresponding transistor to vary along with an RF voltage at a drain of the corresponding transistor.
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Specification