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Method and structure of MEMS PLCSP fabrication

  • US 9,975,759 B2
  • Filed: 07/11/2017
  • Issued: 05/22/2018
  • Est. Priority Date: 06/30/2014
  • Status: Active Grant
First Claim
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1. A method for forming a package-level chip scale MEMS package comprising:

  • providing a MEMS chip comprising a CMOS substrate having a top surface having a first portion and a second portion and comprising a MEMS cap disposed upon the first portion of the CMOS substrate, wherein the CMOS substrate is associated with a first thickness, wherein the MEMS cap is associated with a second thickness, wherein the MEMS cap and the first portion of the top surface form an enclosed cavity, wherein at least a MEMS device is formed on the first portion of the top surface and disposed within the enclosed cavity, wherein the second portion of the top surface of the CMOS substrate is substantially free of the cap and includes at least a first bonding region;

    providing a packaging substrate having a first substrate region including a top surface having a first portion and a second portion, wherein the first portion is characterized by a third thickness, wherein the second portion is characterized by a fourth thickness, wherein the third thickness exceeds the fourth thickness by at least the second thickness associated with the cap, wherein the first portion of the top surface of the packaging substrate includes at least a second bonding region;

    orienting the MEMS chip relative to the packaging substrate such that the second portion of the top surface of the CMOS substrate is opposed to the first portion of the top surface of the packaging substrate, and such that the MEMS cap is disposed above the second portion of the top surface of the packaging substrate;

    disposing an adhesive material between the MEMS cap and the second portion of the top surface of the packaging substrate;

    bonding the MEMS cap and the second portion of the top surface of the packaging substrate using the adhesive material;

    bonding the first bonding region to the second bonding region; and

    separating the first substrate region of the packaging substrate away from a second substrate region, wherein the first substrate region forms the package-level chip scale MEMS package.

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