Stacked semiconductor structure and method of forming the same
First Claim
1. A stacked semiconductor structure comprising:
- a first substrate having at least one transistor disposed over the first substrate;
a multilayer interconnect disposed over the at least one transistor and electrically coupled to the at least one transistor;
metal sections disposed over the multilayer interconnect;
first bonding features over the metal sections;
a second substrate having a bottom surface, the second substrate comprising silicon or germanium;
a first dielectric layer disposed on the bottom surface of the second substrate;
a cavity extending from a surface of the first dielectric layer into a depth D of the silicon or germanium of the second substrate, wherein top and side surfaces of the cavity comprise the silicon or germanium of the second substrate;
a movable structure as a continuous unit disposed between the second substrate and the multilayer interconnect, the movable structure including a first portion of a cap dielectric layer, a first portion of a metal units layer in contact with the first portion of the cap dielectric layer, and a dielectric membrane in contact with the first portion of the metal units layer; and
second bonding features on a second portion of the cap dielectric layer, the second bonding features bonded to the first bonding features, wherein the second bonding features extend through the second portion of the cap dielectric layer and electrically connect to a second portion of the metal units layer.
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Accused Products
Abstract
A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.
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Citations
20 Claims
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1. A stacked semiconductor structure comprising:
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a first substrate having at least one transistor disposed over the first substrate; a multilayer interconnect disposed over the at least one transistor and electrically coupled to the at least one transistor; metal sections disposed over the multilayer interconnect; first bonding features over the metal sections; a second substrate having a bottom surface, the second substrate comprising silicon or germanium; a first dielectric layer disposed on the bottom surface of the second substrate; a cavity extending from a surface of the first dielectric layer into a depth D of the silicon or germanium of the second substrate, wherein top and side surfaces of the cavity comprise the silicon or germanium of the second substrate; a movable structure as a continuous unit disposed between the second substrate and the multilayer interconnect, the movable structure including a first portion of a cap dielectric layer, a first portion of a metal units layer in contact with the first portion of the cap dielectric layer, and a dielectric membrane in contact with the first portion of the metal units layer; and second bonding features on a second portion of the cap dielectric layer, the second bonding features bonded to the first bonding features, wherein the second bonding features extend through the second portion of the cap dielectric layer and electrically connect to a second portion of the metal units layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A stacked semiconductor structure comprising:
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a CMOS device, the CMOS device comprising; a first substrate; a multilayer interconnect disposed over the first substrate; a bottom electrode disposed over the multilayer interconnect, the bottom electrode comprising a first segment and a second segment; a protection dielectric layer disposed over and in contact with the bottom electrode, the protection dielectric layer having a first extension extending vertically further from the first segment of the bottom electrode than vertically from the second segment of the bottom electrode; and first bonding features over the bottom electrode; and a MEMS device, the MEMS device comprising; a second substrate having a lower surface; a cavity extending upward from the lower surface into a depth D in the second substrate, surfaces of the cavity within the depth D comprising silicon or germanium substrate material; a flexible dielectric membrane interposed between the second substrate and the CMOS device and suspended under the cavity, the flexible dielectric membrane having a thickness in a range from about 0.5 micrometers to about 5 micrometers; a top electrode disposed on the flexible dielectric membrane; a cap dielectric layer disposed on the top electrode; and second bonding features interposed between the cap dielectric layer and the first bonding features, the second bonding features bonded to the first bonding features, wherein the top electrode and the bottom electrode construct a capacitor having a variable capacitance. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A stacked semiconductor structure comprising:
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a first substrate having a front surface; a first dielectric layer disposed on the first substrate; a plurality of metal segments disposed on the first dielectric layer; a dielectric membrane on the first dielectric layer and the plurality of metal segments, the dielectric membrane comprising at least one opening exposing at least a portion of one of the plurality of metal segments; a plurality of metal units disposed on the dielectric membrane and on a bottom surface and sidewalls of the at least one opening; a cap dielectric layer disposed over the dielectric membrane and the plurality of metal units, the cap dielectric layer comprising at least one via disposed therein, the via exposing a portion of one of the plurality of metal units; a first connection feature disposed over the via and electrically connected to the exposed portion of the one of the plurality of metal units; a moveable unit comprising; a first portion of the first dielectric layer, a first portion of the plurality of metal segments disposed on the first portion of the first dielectric layer, a first portion of the dielectric membrane disposed on the first portion of the first dielectric layer and the first portion of the plurality of metal segments, a first portion of the plurality of metal units disposed on the first portion of the dielectric membrane, and a first portion of the cap dielectric layer disposed over the first portion of the dielectric membrane and first portion of the plurality of metal units; a first cavity extending from the front surface of the first substrate into a depth D in the first substrate, the first cavity extending laterally under a portion of the first dielectric layer; a CMOS device comprising a second connection feature disposed on a first surface of the CMOS device, the second connection feature being bonded to the first connection feature; and a second cavity comprising the first cavity and a space formed between the CMOS device and the cap dielectric layer, the moveable unit suspended in the second cavity. - View Dependent Claims (19, 20)
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Specification