Gate-all-around fin device
First Claim
1. A method comprising:
- forming a plurality of fin structures from a substrate;
forming a well of a first conductivity type and a well of a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures;
forming a source contact on an exposed portion of a first fin structure of the plurality of fin structures;
forming drain contacts on exposed portions of second fin structures of the plurality of fin structures, wherein the second fin structures are adjacent to the first fin structure; and
forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type, wherein;
the well of the first conductivity type is formed as a shallow N-well and the well of the second conductivity type is formed as a P-well, andthe gate structure is formed partially over the shallow N-well and the P-well.
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Accused Products
Abstract
A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.
36 Citations
20 Claims
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1. A method comprising:
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forming a plurality of fin structures from a substrate; forming a well of a first conductivity type and a well of a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures; forming a source contact on an exposed portion of a first fin structure of the plurality of fin structures; forming drain contacts on exposed portions of second fin structures of the plurality of fin structures, wherein the second fin structures are adjacent to the first fin structure; and forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type, wherein; the well of the first conductivity type is formed as a shallow N-well and the well of the second conductivity type is formed as a P-well, and the gate structure is formed partially over the shallow N-well and the P-well. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A semiconductor device comprising:
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a plurality of fin structures formed on a substrate; a well of a first conductivity type and a well of a second conductivity type formed within the substrate and corresponding fin structures of the plurality of fin structures; a source contact formed on an exposed portion of a first fin structure of the plurality of fin structures; drain contacts formed on exposed portions of second fin structures of the plurality of fin structures, wherein the second fin structures are adjacent to the first fin structure; and a gate structure formed in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type, wherein; the well of the first conductivity type is formed as a shallow N-well and the well of the second conductivity type is formed as a P-well, and the gate structure is formed partially over the shallow N-well and the P-well. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20)
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Specification