Transaction abort instruction specifying a reason for abort

• US 9,983,883 B2
• Filed: 08/09/2016
• Issued: 05/29/2018
• Est. Priority Date: 06/15/2012
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Greiner, Dan F., Jacobi, Christian, Mitran, Marcel, Slegel, Timothy J.
• Primary Examiner(s): Vicary, Keith
• Assistant Examiner(s): Nguyen, William
• Application Number:
  US15/232,299
• Publication Number:
  US 20160350129A1
• Time in Patent Office: 658 Days
• CPC Class Codes: G06F 9/30087 Synchronisation or serialisation instructions
• CPC Class Codes: G06F 9/30101 Special purpose registers
• CPC Class Codes: G06F 9/3834 Maintaining memory consistency
• CPC Class Codes: G06F 9/38585 with result invalidation, e.g. nullification
• CPC Class Codes: G06F 9/3861 Recovery, e.g. branch miss-prediction, exception handling error detection or correction G06F11/00
• CPC Class Codes: G06F 9/3863 using multiple copies of the architectural state, e.g. shadow registers

Abstract

A TRANSACTION ABORT instruction is used to abort a transaction that is executing in a computing environment. The TRANSACTION ABORT instruction includes at least one field used to specify a user-defined abort code that indicates the specific reason for aborting the transaction. Based on executing the TRANSACTION ABORT instruction, a condition code is provided that indicates whether re-execution of the transaction is recommended.

Claims

1. A computer-implemented method of executing an instruction within a computing environment, said computer-implemented method comprising:

obtaining a machine instruction for execution, the machine instruction being a transaction abort machine instruction having associated therewith;

an operation code to specify a transaction abort operation; and

at least one field to be used to specify an abort code, wherein the abort code provides a specific reason why a transaction executing within the computing environment is to be aborted; and

executing the machine instruction to explicitly abort the transaction, the executing comprising;

aborting the transaction that is executing, wherein the transaction ends prior to completion; and

providing a condition code based on the abort code specified by the at least one field of the machine instruction, the condition code to indicate whether re-execution of the transaction is recommended, and wherein the providing the condition code comprises setting the condition code to a first value based on a specified portion of the abort code specified by the at least one field of the machine instruction being one value and setting the condition code to a second value based on the specified portion of the abort code specified by the at least one field of the machine instruction being another value.

2. The computer-implemented method of claim 1, wherein the machine instruction has associated therewith a base field, and wherein based on the base field being zero, the at least one field includes a displacement field, and wherein a value of the displacement field specifies the abort code.

3. The computer-implemented method of claim 2, wherein based on the base field being nonzero, the displacement field and the base field are used to create the abort code.

4. The computer-implemented method of claim 1, wherein the abort code provides a user-defined specific reason for aborting, and wherein the machine instruction is a transaction abort instruction obtained from a program address specified by a machine program status word (PSW).

5. The computer-implemented method of claim 4, further comprising:

subsequent to executing the machine instruction, replacing the program address of the machine PSW with another program address obtained from a separate and distinct transaction PSW; and

continuing execution of instructions beginning with an instruction at the other program address of the machine PSW.

6. The computer-implemented method of claim 1, wherein the condition code comprises the first value based on a specified bit of the abort code being the one value, and the second value based on the specified bit being the other value.

7. The computer-implemented method of claim 1, wherein the first value indicates re-execution is recommended and the second value indicates re-execution is not recommended.

8. The computer-implemented method of claim 1, further comprising placing the abort code in a transaction diagnostic block.

9. The computer-implemented method of claim 8, wherein the transaction diagnostic block is specified by one of an instruction that initiated the transaction being aborted, or an instruction that initiated another transaction, in which the transaction and the other transaction are nested.

10. The computer-implemented method of claim 1, further comprising based on aborting the transaction, committing to memory non-transactional store accesses and discarding transactional store accesses.