Controller IC with zero-crossing detector and capacitor discharge switching element
First Claim
1. An integrated circuit (IC) comprising:
- a power converter controller to regulate an output of a power converter, the power converter having first and second input terminals to receive an ac line voltage, an x-capacitor being coupled across the first and second input terminals;
a regulator circuit configured to regulate a supply voltage provided to the power converter controller;
a discharge circuit, which includes;
a switching element for coupling across the first and second input terminals; and
a detector circuit coupled to the switching element, the detector circuit comprising;
first and second comparators, each having a first input respectively coupled to the first and second input terminals, the first and second comparators respectively producing first and second output signals responsive to a zero-crossing event of the ac line voltage;
circuitry coupled to receive the first and second output signals, the circuitry outputting a discharge signal when neither the first nor second output signals are received within a delay time period, the discharge signal being coupled to activate the switching element, when activated, the switching element providing a discharge path to discharge a voltage across the x-capacitor.
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Abstract
An integrated circuit (IC) for controlling the discharge of a capacitor coupled across first and second input terminals of a power converter circuit, wherein the first and second terminals for receiving an ac line voltage. The IC includes a switching element coupled across the first and second input terminals and a detector circuit. The detector circuit including first and second comparators that produce first and second output signals responsive to a zero-crossing event of the ac line voltage. The first and second output signals being used to generate a reset signal coupled to a timer circuit responsive to the zero-crossing event. When the reset signal is not received within a delay time period, the timer circuit outputs a discharge signal that turns the switching element on, thereby discharging the capacitor.
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Citations
7 Claims
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1. An integrated circuit (IC) comprising:
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a power converter controller to regulate an output of a power converter, the power converter having first and second input terminals to receive an ac line voltage, an x-capacitor being coupled across the first and second input terminals; a regulator circuit configured to regulate a supply voltage provided to the power converter controller; a discharge circuit, which includes; a switching element for coupling across the first and second input terminals; and a detector circuit coupled to the switching element, the detector circuit comprising; first and second comparators, each having a first input respectively coupled to the first and second input terminals, the first and second comparators respectively producing first and second output signals responsive to a zero-crossing event of the ac line voltage; circuitry coupled to receive the first and second output signals, the circuitry outputting a discharge signal when neither the first nor second output signals are received within a delay time period, the discharge signal being coupled to activate the switching element, when activated, the switching element providing a discharge path to discharge a voltage across the x-capacitor.
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2. The IC of claim 1 wherein the circuitry comprises:
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a logic circuit coupled to receive the first and second output signals, the logic circuit outputting a reset signal responsive to the first and second output signals; and a timer circuit coupled to receive the pulsed reset signal, the timer circuit outputting the discharge signal when the reset signal is not received within the delay time period.
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3. The IC of claim 1 wherein the switching element comprises first and second high-voltage transistor switches coupled in series across the first and second input terminals.
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4. The IC of claim 3 wherein the switching element further comprises first and second junction field-effect transistors (JFETs), the first JFET being coupled to the first high-voltage transistor switch at a first node, and the second JFET being coupled to the second high-voltage transistor switch at a second node, the first and second nodes being respectively coupled to the first and second comparators.
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5. The IC of claim 2 wherein the timer circuit includes a timing capacitor that discharges responsive to the reset signal.
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6. The IC of claim 1 wherein the first and second comparators comprise low-voltage devices.
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7. The IC of claim 1 wherein the first input of the first and second comparators comprises a positive input, a negative input of each of the first and second comparators being coupled to a reference voltage.
Specification