On-chip randomness generation
First Claim
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1. A noise generating apparatus comprising:
- a zener diode located on a primary surface of a silicon substrate, wherein the zener diode comprises a P-doped silicon layer on the primary surface of the silicon substrate, and an N-doped polysilicon feature extending up from the P-doped silicon layer, the N-doped polysilicon feature having an upper portion that is wider than a lower portion, the zener diode further comprising spacers covering opposite sides of the lower portion of the N-doped polysilicon feature;
a voltage source located on the silicon substrate to provide a supply voltage;
a current probe for receiving the supply voltage from the voltage source and providing a voltage to the zener diode, the current probe mirroring the current through the zener diode; and
a current monitor located on the silicon substrate to monitor current through the zener diode and adjust the supply voltage provided by the voltage source to maintain the zener diode in an avalanche zone close to a breakdown condition, the current monitor operable to receive the mirrored current from the current probe, the current monitor comprising a trans-impedance amplifier to monitor the current from the current probe and provide an output voltage, wherein the current monitor provides a decrement signal to the voltage source when the output voltage is below a first zener threshold voltage, and an increment signal to the voltage source when the output voltage is above a second zener threshold voltage.
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Abstract
An on-chip true noise generator including an embedded noise source with a low-voltage, high-noise zener diode(s), and an in-situ close-loop zener diode power control circuit. The present invention proposes the use of heavily doped polysilicon and silicon p-n diode(s) structures to minimize the breakdown voltage, increasing noise level and improving reliability. The present invention also proposes an in-situ close-loop zener diode control circuit to safe-guard the zener diode from catastrophic burn-out.
65 Citations
18 Claims
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1. A noise generating apparatus comprising:
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a zener diode located on a primary surface of a silicon substrate, wherein the zener diode comprises a P-doped silicon layer on the primary surface of the silicon substrate, and an N-doped polysilicon feature extending up from the P-doped silicon layer, the N-doped polysilicon feature having an upper portion that is wider than a lower portion, the zener diode further comprising spacers covering opposite sides of the lower portion of the N-doped polysilicon feature; a voltage source located on the silicon substrate to provide a supply voltage; a current probe for receiving the supply voltage from the voltage source and providing a voltage to the zener diode, the current probe mirroring the current through the zener diode; and a current monitor located on the silicon substrate to monitor current through the zener diode and adjust the supply voltage provided by the voltage source to maintain the zener diode in an avalanche zone close to a breakdown condition, the current monitor operable to receive the mirrored current from the current probe, the current monitor comprising a trans-impedance amplifier to monitor the current from the current probe and provide an output voltage, wherein the current monitor provides a decrement signal to the voltage source when the output voltage is below a first zener threshold voltage, and an increment signal to the voltage source when the output voltage is above a second zener threshold voltage. - View Dependent Claims (2, 3, 4, 5, 6, 18)
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7. A noise generating apparatus comprising:
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two noise generating units each comprising; an adjustable voltage source on a silicon substrate to provide a supply voltage; a current probe comprising a first MOSFET and a second MOSFET for receiving the supply voltage from the adjustable voltage source, the first MOSFET and the second MOSFET of the current probe form a current mirror; a zener diode located on a primary surface of the silicon substrate, the zener diode comprises a P-doped silicon layer on the primary surface of the silicon substrate, and an N-doped polysilicon feature extending up from the P-doped silicon layer, the N-doped polysilicon feature having an upper portion that is wider than a lower portion, the zener diode further comprising spacers covering opposite sides of the lower portion of the N-doped polysilicon feature such that a width of the upper portion of the N-doped polysilicon feature is equal to a combined width of the lower portion of the N-doped polysilicon feature and a width of both spacers, and the zener diode receives the supply voltage from the first MOSFET of the current probe; and a current monitor located on the silicon substrate to monitor current through the zener diode and adjust the supply voltage provided by the adjustable voltage source to maintain the zener diode in an avalanche zone close to a breakdown condition, the current monitor comprising a trans-impedance amplifier to monitor the current received from the second MOSFET of the current probe, and provide an output voltage to a first operational amplifier and a second operational amplifier such that the first operational amplifier compares the output voltage of the trans-impedance amplifier to a first threshold voltage and the second operational amplifier compares the output voltage of the trans-impedance amplifier to a second threshold voltage, wherein the noise signal from one noise generating unit is provided to the non-inverting input of an operational amplifier and the noise signal from the other noise generating unit is provided to the inverting input of the operational amplifier such that a resulting noise signal output from the operational amplifier is increased by a factor of √
{square root over (2)} from the noise signal of either of the two noise generating units alone. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. A noise generating apparatus comprising:
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an adjustable voltage source on a silicon substrate to provide a supply voltage, the adjustable voltage source comprises a counter, a digital to analog converter, a first resistor, a second resistor, and a closed loop operational amplifier, the digital to analog converter receives an output from the counter and provides an adjustable voltage to the non-inverting input of the closed loop operational amplifier via the first resistor, the closed loop operational amplifier receives a fixed voltage at the non-inverting input via the second resistor; a current probe comprising a first MOSFET and a second MOSFET for receiving the supply voltage from the adjustable voltage source, the first MOSFET and the second MOSFET of the current probe form a current mirror, the closed loop operational amplifier of the adjustable voltage source provides the supply voltage to the first MOSFET and second MOSFET of the current probe; a zener diode located on a primary surface of the silicon substrate receives the supply voltage from the first MOSFET of the current probe, the zener diode comprises a P-doped silicon layer on the primary surface of the silicon substrate, and an N-doped polysilicon feature extending up from the P-doped silicon layer, the N-doped polysilicon feature having an upper portion that is wider than a lower portion, the zener diode further comprising spacers covering opposite sides of the lower portion of the N-doped polysilicon feature, the P-doped silicon layer is heavily doped with a p-type dopant with a concentration greater than 1018 cm−
3, and the N-doped polysilicon feature is heavily doped with an n-type dopant with a concentration greater than 1018 cm−
3, and the voltage at the input to the zener diode is provided to a first terminal of a capacitor, and the a second terminal of the capacitor outputs a noise signal of the noise generating apparatus; anda current monitor located on the silicon substrate to monitor current through the zener diode and adjust the supply voltage provided by the adjustable voltage source to maintain the zener diode in an avalanche zone close to a breakdown condition, the current monitor comprising a first operational amplifier and a third resistor configured as a trans-impedance amplifier, current from the second MOSFET of the current probe is provided to the inverting input of the first operational amplifier and an input of the third resistor, a positive bias voltage is provided to the non-inverting input of the first operational amplifier, outputs of both the first operational amplifier and the third resistor are provided to both the inverting input of a second operational amplifier and the non-inverting input of a third operational amplifier such that the second operational amplifier compares the output voltage of the trans-impedance amplifier to a first threshold voltage provided to the non-inverting input of the first operational amplifier and the second operational amplifier compares the output voltage of the trans-impedance amplifier to a second threshold voltage provided to the inverting input of the second operational amplifier, when the output of the trans-impedance amplifier is lower than the first threshold voltage the output of the first operational amplifier is logic high causing a first AND gate to output a clock pulse to a decrement input of the counter of the adjustable voltage source in order to lower the supply voltage, and when the output of the trans-impedance amplifier is higher than the second threshold voltage the output of the second operational amplifier is logic high causing a second AND gate to output a clock pulse to a increment input of the counter of the adjustable voltage source in order to increase the supply voltage. - View Dependent Claims (15, 16, 17)
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Specification