System for reducing noise in a chemical sensor array
First Claim
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1. A system comprising:
- a power supply;
a clock circuitry operably coupled to the power supply, the clock circuitry configured to generate a plurality of clock signals, each clock signal of the plurality of clock signals being synchronous with a primary clock signal and each clock signal having a cycle that spans multiple cycles of the primary clock signal; and
a plurality of switchers operably coupled to receive the plurality of clock signals, wherein the plurality of switchers comprises;
a first set of switchers having a low power draw, anda second set of switchers having a high power draw,wherein the clock circuitry is further configured to;
supply a first group of the plurality of clock signals to the first set of switchers;
offset each clock signal in the first group from each other by a first number of cycles of the primary clock signal;
supply a second group of the plurality of clock signals to the second set of switchers; and
offset each clock signal in the second group from each other by a second number of cycles of the primary clock signal,wherein the second number of cycles of the primary clock signal for the offset of each clock signal in the second group is larger than the first number of cycles of the primary clock signal for the offset of each clock signal in the first group.
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Abstract
A system including a power supply and a clock circuitry to generate a plurality of clock signals. Each clock signal is synchronous with a primary clock signal. First, second, and third clock signals of the plurality of clock signals are asynchronous to each other. The system further includes a plurality of switches. Each switch of the plurality of switches is communicatively coupled to the power supply and the clock circuitry. A first switch of the plurality of switches receives the first clock signal, a second switch of the plurality of switches receives the second clock signal, and a third switch of the plurality of switches receives the third clock signal.
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Citations
17 Claims
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1. A system comprising:
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a power supply; a clock circuitry operably coupled to the power supply, the clock circuitry configured to generate a plurality of clock signals, each clock signal of the plurality of clock signals being synchronous with a primary clock signal and each clock signal having a cycle that spans multiple cycles of the primary clock signal; and a plurality of switchers operably coupled to receive the plurality of clock signals, wherein the plurality of switchers comprises; a first set of switchers having a low power draw, and a second set of switchers having a high power draw, wherein the clock circuitry is further configured to; supply a first group of the plurality of clock signals to the first set of switchers; offset each clock signal in the first group from each other by a first number of cycles of the primary clock signal; supply a second group of the plurality of clock signals to the second set of switchers; and offset each clock signal in the second group from each other by a second number of cycles of the primary clock signal, wherein the second number of cycles of the primary clock signal for the offset of each clock signal in the second group is larger than the first number of cycles of the primary clock signal for the offset of each clock signal in the first group. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method of providing power to a circuitry, the method comprising:
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supplying power with a power supply to a plurality of switchers, wherein a first set of the plurality of switchers has a low power draw and a second set of the plurality of switchers has a high power draw; generating a plurality of clock signals with a clock circuitry operably coupled to the plurality of switchers, each clock signal of the plurality of clock signals being synchronous with a primary clock signal and each clock signal of the plurality of clock signals having a cycle that spans multiple cycles of the primary clock signal; supplying a first group of the plurality of clock signals to the first set of switchers; offsetting each clock signal in the first group from each other by a first number of cycles of the primary clock signal; supplying a second group of the plurality of clock signals to the second set of switchers; and offsetting each clock signal in the second group from each other by a second number of cycles of the primary clock signal, wherein the second number of cycles of the primary clock signal for the offsetting of each clock signal in the second group is larger than the first number of cycles of the primary clock signal for the offsetting of each clock signal in the first group. - View Dependent Claims (13, 14, 15, 16, 17)
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Specification