High precision packet generation in software using a hardware time stamp counter

• US 9,985,864 B2
• Filed: 08/04/2010
• Issued: 05/29/2018
• Est. Priority Date: 08/04/2010
• Status: Active Grant

• Current Assignee: Keysight Technologies Singapore (Holdings) Pte. Limited. (Keysight Technologies, Inc.)
• Original Assignee: Keysight Technologies Singapore (Holdings) Pte. Limited. (Keysight Technologies, Inc.)
• Inventors: Gruber, Matei, Stanciu, Adrian
• Primary Examiner(s): SWEET, LONNIE V
• Application Number:
  US12/850,505
• Publication Number:
  US 20120033562A1
• Time in Patent Office: 2,855 Days
• Field of Search: None
• CPC Class Codes: H04L 43/08 Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
• CPC Class Codes: H04L 43/106 using time related information in packets, e.g. by adding timestamps
• CPC Class Codes: H04L 43/12 Network monitoring probes
• CPC Class Codes: H04L 43/50 Testing arrangements

Abstract

There is disclosed a system and method for high precision packet generation in software using a hardware time stamp counter. The method may include receiving user selection to create a network test and receiving test information from the user, the test information including a packet transmission rate. A packet transmission interval may be calculated based on the packet transmission rate. The network test is executed. Packets are transmitted at the packet transmission rate, including checking a hardware counter to learn if the packet transmission interval has elapsed and, when the packet transmission interval has elapsed, sending the packet over a network. The method may be performed by a network testing system or computing device.

Claims

1. A network testing system having at least one network card, the network card including a processor, a hardware counter, a memory and a network communications unit, the network testing system coupled with a network, the network testing system having instructions stored thereon which when executed cause the network testing system to perform operations comprising:

receiving user selection to create a network test;

receiving test information from the user, the test information including a transmission rate and packet creation information;

calculating a packet transmission interval based on the transmission rate, wherein the packet transmission interval defines how often packets will be sent to achieve evenness in packet transmissions during a time period at the user specified packet transmission rate;

receiving user selection to execute the network test transmitting packets specified in the network test over the network at the packet transmission rate, including;

preparing a packet including at least a payload and a header according to the packet creation information;

directly accessing and checking the hardware counter to learn if the packet transmission interval has elapsed, wherein the hardware counter comprises a time stamp counter (TSC) register included within processor that increments or counts at regular uniform intervals from when the processor is powered on and wherein directly accessing the hardware counter includes reading the TSC register using a routine located within a kernel of an operating system executing on the network card; and

when the packet transmission interval has elapsed, sending the packet over the network.

2. A computing device having at least one virtual machine executing network testing software, the computing device including a processor, a hardware counter, a memory and a network communications unit, the computing device coupled with a network, the network testing software comprising instructions which when executed cause the computing device to perform operations comprising:

receiving user selection to create a network test;

receiving test information from the user, the test information including a transmission rate and packet creation information;

calculating a packet transmission interval based on the transmission rate, wherein the packet transmission interval defines how often packets will be sent to achieve evenness in packet transmissions during a time period at the user specified transmission rate;

receiving user selection to execute the network test transmitting packets specified in the network test over the network at the packet transmission rate, including;

preparing a packet including at least a payload and a header according to the packet creation information;

directly accessing and checking the hardware counter to learn if the packet transmission interval has elapsed, wherein the hardware counter comprises a time stamp counter (TSC) register included within processor that increments or counts at regular uniform intervals from when the processor is powered on and wherein directly accessing the hardware counter includes reading the TSC register using a routine located within a kernel of an operating system executing on the network card; and

when the packet transmission interval has elapsed, sending the packet over the network.

3. A non-transitory machine readable storage medium having instructions stored thereon which when executed cause a computing device to perform operations comprising:

receiving user selection to create a network test;

receiving test information from the user, the test information including a transmission rate and packet creation information;

calculating a packet transmission interval based on the transmission rate, wherein the packet transmission interval defines how often packets will be sent to achieve evenness in packet transmissions during a time period at the user specified packet transmission rate;

receiving user selection to execute the network test transmitting packets specified in the network test over a network at the packet transmission rate, including

preparing a packet including at least a payload and a header according to the packet creation information;

directly accessing and checking a hardware counter to learn if the packet transmission interval has elapsed, wherein the hardware counter comprises a time stamp counter (TSC) register the included within processor that increments or counts at regular uniform intervals from when the processor is powered on and wherein directly accessing the hardware counter includes reading the TSC register using a routine located within a kernel of an operating system executing on the network card; and

when the packet transmission interval has elapsed, sending the packet over the network.