Organic light-emitting diode display

• US 9,990,886 B2
• Filed: 11/23/2016
• Issued: 06/05/2018
• Est. Priority Date: 11/23/2015
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Lee, Seungkyu, Kwon, Taehoon
• Primary Examiner(s): Sadio, Insa
• Application Number:
  US15/360,845
• Publication Number:
  US 20170169764A1
• Time in Patent Office: 559 Days
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0452 Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0852 being a dynamic memory with more than one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0242 Compensation of deficiencies in the appearance of colours
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a display unit and a plurality of pixels over the display unit. Each of the pixels comprises first and second sub-pixels each comprising an OLED and a pixel circuit. Each pixel circuit is connected to a first node and a first control line that is configured to supply a first control signal having a rising edge prior to a time when the OLED emits light in a frame. Each pixel circuit is further connected to a second node and a light emitting signal line that is configured to supply a light emitting signal having a falling edge prior to a time when the OLED emits light in the frame. The pixel circuit of the first sub-pixel comprises a first timing compensating capacitor connecting the first node and an anode of the OLED.

Claims

1. An organic light-emitting diode (OLED) display, comprising:

a display unit; and

a plurality of pixels in the display unit,

wherein each of the pixels comprises first and second sub-pixels, each sub-pixel comprising an OLED and a pixel circuit,

wherein each of the pixel circuits of the first and second sub-pixels is connected to a first node and a first control line that is configured to supply a first control signal having a rising edge prior to a time when the OLED emits light in a frame, wherein each pixel circuit is further connected to a second node and a light emitting signal line that is configured to supply a light emitting signal having a falling edge prior to a time when the OLED emits light in the frame, and

wherein the pixel circuit of the first sub-pixel comprises a first timing compensating capacitor connecting the first node and an anode of the OLED.

2. The OLED display of claim 1, wherein the first control signal is configured to determine an initialization time of an anode voltage of the OLED, and wherein the light emitting signal is configured to determine a light emitting time of the OLED.

3. The OLED display of claim 1, wherein each of the pixel circuits further comprises a gate connected to a gate node and a driving transistor configured to supply a driving current to the OLED according to a voltage of the gate.

4. The OLED display of claim 3, wherein each of the pixel circuits comprises a gate initialization transistor configured to change a voltage level of the gate node to a level of a first initialization voltage in response to a second control signal and an anode initialization transistor configured to initialize the voltage level of the anode of the OLED in response to the first control signal.

5. The OLED display of claim 4, wherein the pixel circuit of the first sub-pixel is configured to change the voltage level of the anode of the OLED to the level of the first initialization voltage via the anode initialization transistor, and wherein the pixel circuit of the second sub-pixel is configured to change the voltage level of the anode of the OLED of the second sub-pixel to the level of a second initialization voltage via the anode initialization transistor.

6. The OLED display of claim 5, wherein the level of the second initialization voltage is identical to the level of a driving voltage supplied to a cathode of the OLED of the second sub-pixel.

7. The OLED display of claim 4, wherein the anode initialization transistor is configured to be turned on in response to at least one of a rising edge voltage and a high flat voltage of the first control signal prior to a time when the OLED emits light via the light emitting signal in one frame.

8. The OLED display of claim 7, wherein the first timing compensating capacitor couples the first node and the anode of the OLED of the first sub-pixel.

9. The OLED display of claim 1, wherein the pixel circuit of the second sub-pixel comprises a second timing compensating capacitor connecting the second node and the anode of the OLED.

10. The OLED display of claim 9, wherein the second timing compensating capacitor couples the light emitting line and the anode of the OLED of the first sub-pixel.

11. The OLED display of claim 1, wherein a central wavelength of visible light emitted from the first sub-pixel is in the range from about 500 nm to about 600 nm, and wherein the central wavelength of visible light emitted from the second sub-pixel is in the range from about 500 nm to about 600 nm.

12. The OLED display of claim 1, wherein the OLED of the first sub-pixel has a capacitance different from the OLED of the second sub-pixel.

13. An organic light-emitting (OLED) display, comprising:

a display unit; and

a plurality of pixels in the display unit,

wherein each of the pixels comprises first and second sub-pixels, each sub-pixel comprising an OLED and a pixel circuit,

wherein each of the pixel circuits of the first and second sub-pixels is connected to a first node and a first control line that is configured to supply a first control signal having the rising edge prior to a time when the OLED emits light in a frame, wherein each pixel circuit is further connected to a second node and a light emitting signal line that is configured to supply a light emitting signal having a falling edge prior to a time when the OLED emits light in the frame, and

wherein the pixel circuit of the second sub-pixel comprises a second timing compensating capacitor connecting the second node and an anode of the OLED.

14. The OLED display of claim 13, wherein the first control signal is configured to determine an initialization time of an anode voltage of the OLED, and wherein the light emitting signal is configured to determine a light emitting time of the OLED.

15. The OLED display of claim 13, wherein each of the pixel circuits further comprises a gate connected to a gate node and a driving transistor configured to supply a driving current to the OLED according to a voltage of the gate.

16. The OLED display of claim 15, wherein each of the pixel circuits comprises a gate initialization transistor configured to change a voltage level of the gate node to a level of a first initialization voltage in response to a second control signal and an anode initialization transistor configured to initialize the voltage level of the anode of the OLED in response to the first control signal.

17. The OLED display of claim 16, wherein the pixel circuit of the first sub-pixel is configured to change the voltage level of the anode of the OLED to the level of the first initialization voltage via the anode initialization transistor, and wherein the pixel circuit of the second sub-pixel is configured to change the voltage level of the anode of the OLED of the second sub-pixel to the level of a second initialization voltage via the anode initialization transistor.

18. The OLED display of claim 17, wherein the level of the second initialization voltage is identical to the level of a driving voltage supplied to a cathode of the OLED of the second sub-pixel.

19. The OLED display of claim 16, wherein the anode initialization transistor is configured to be turned on in response to at least one of the rising edge voltage and the high flat voltage of the first control signal prior to a time when the OLED emits light via the light emitting signal in one frame.

20. The OLED display of claim 13, wherein the second timing compensating capacitor couples the light emitting line and the anode of the OLED of the first sub-pixel.