Offset-printing method for three-dimensional package

• US 9,990,961 B2
• Filed: 12/15/2016
• Issued: 06/05/2018
• Est. Priority Date: 09/01/2011
• Status: Expired due to Fees

• Current Assignee: ChengDu HaiCun IP Technology LLC, Guobiao Zhang
• Original Assignee: ChengDu HaiCun IP Technology LLC, Guobiao Zhang
• Inventors: Zhang, Guobiao
• Primary Examiner(s): Elms, Richard
• Assistant Examiner(s): Bashar, Mohammed A
• Application Number:
  US15/381,080
• Publication Number:
  US 20170098651A1
• Time in Patent Office: 537 Days
• CPC Class Codes: G11C 11/56 using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
• CPC Class Codes: G11C 17/00 Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
• CPC Class Codes: G11C 17/06 using diode elements G11C17/14 takes precedence
• CPC Class Codes: G11C 17/16 using electrically-fusible links
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 2213/71 Three dimensional array
• CPC Class Codes: G11C 5/02 Disposition of storage elements, e.g. in the form of a matrix array
• CPC Class Codes: G11C 8/06 Address interface arrangements, e.g. address buffers
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 2224/32145 the bodies being stacked
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48145 the bodies being stacked
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2225/06506 Wire or wire-like electrical connections between devices
• CPC Class Codes: H01L 2225/06562 at least one device in the stack being rotated or offset
• CPC Class Codes: H01L 2225/06582 Housing for the assembly, e.g. chip scale package [CSP]
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 27/1021 including diodes only
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H10B 20/20 : Programmable ROM [PROM] devices comprising field-effect components H10B20/10 takes precedence
• CPC Class Codes: H10B 20/50 : having transistors on different levels, e.g. 3D ROM
• CPC Class Codes: H10B 99/00 : Subject matter not provided for in other groups of this subclass

Abstract

The present invention discloses an offset-printing method for a three-dimensional 3D-oP (three-dimensional offset-printed memory)-based package. The mask-patterns for different 3D-op dice are merged onto a same data-mask. At different printing steps, a wafer is offset by different values with respect to the data-mask. Accordingly, data-patterns from a same data-mask are printed into different 3D-oP dice.

Claims

1. An offset-printing method for a three-dimensional 3D-oP (three-dimensional offset-printed memory)-based package, comprising the steps of:

1) forming a substrate circuit on a semiconductor wafer, wherein said wafer comprises at least first, second and fourth 3D-oP dice, with said second 3D-oP die adjacent to said first 3D-oP die along the y direction and said fourth 3D-oP die adjacent to said first 3D-oP die along the x direction;

2) a first printing step for transferring a first plurality of mask patterns of a data-mask to a first data-coding layer in said first, second and fourth 3D-oP dice, wherein an origin of said data-mask is initially aligned to an origin of said first die at said first printing step;

3) a second printing step for transferring a second plurality of mask patterns of said data-mask to a second data-coding layer in said first, second and fourth 3D-oP dice, wherein said origin of said data-mask is initially aligned to an origin of said second die at said second printing step;

wherein said first and second plurality of mask patterns are from a same data-mask; and

said first and fourth 3D-oP dice are vertically stacked in said 3-D package.

2. The method according to claim 1, wherein said data-mask comprises a plurality of mask regions whose patterns correspond to said first and second plurality of mask patterns.

3. The method according to claim 2, wherein said 3D-oP dice comprises at least first and second memory levels with said second memory level located above said first memory level, wherein said first data-coding layer is located in said first memory level and said second data-coding layer is located in said second memory level.

4. The method according to claim 3, wherein a mask pattern of a first mask-region is transferred to said first data-coding layer in said first die at said first printing step.

5. The method according to claim 3, wherein a mask pattern of a second mask-region is transferred to said first data-coding layer in said second die at said first printing step.

6. The method according to claim 3, wherein a mask pattern of a fourth mask-region is transferred to said first data-coding layer in said fourth die at said first printing step.

7. The method according to claim 3, wherein a mask pattern of a third mask-region is transferred to said second data-coding layer in said first die at said second printing step.

8. The method according to claim 4, wherein said mask pattern of said first mask-region is transferred to said second data-coding layer in said second die at said second printing step.

9. The method according to claim 3, wherein a mask pattern of a sixth mask-region is transferred to said second data-coding layer in said fourth die at said second printing step.

10. The method according to claim 2, wherein said 3D-oP dice comprises at least a memory level, wherein said first and second data-coding layers are located in said memory level.

11. The method according to claim 10, wherein a mask pattern of a first mask-region is transferred to said first data-coding layer in said first die at said first printing step.

12. The method according to claim 10, wherein a mask pattern of a second mask-region is transferred to said first data-coding layer in said second die at said first printing step.

13. The method according to claim 10, wherein a mask pattern of a fourth mask-region is transferred to said first data-coding layer in said fourth die at said first printing step.

14. The method according to claim 10, wherein a mask pattern of a third mask-region is transferred to said second data-coding layer in said first die at said second printing step.

15. The method according to claim 11, wherein the said mask pattern of said first mask-region is transferred to said second data-coding layer in said second die at said second printing step.

16. The method according to claim 10, wherein a mask pattern of a sixth mask-region is transferred to said second data-coding layer in said fourth die at said second printing step.

17. The method according to claim 1, wherein a displacement between said first and second 3D-oP dice is smaller than a stepping distance of said first printing step.

18. The method according to claim 1, wherein a displacement between said first and second 3D-oP dice is smaller than a stepping distance of said second printing step.

19. The method according to claim 1, wherein said first or second printing step is photo-lithography.

20. The method according to claim 1, wherein said first or second printing step is imprint-lithography.