Method and apparatus for storing data in a reference layer in magnetoresistive memory cells

• US 9,990,976 B1
• Filed: 01/19/2017
• Issued: 06/05/2018
• Est. Priority Date: 04/03/2015
• Status: Active Grant

• Current Assignee: Everspin Technologies Incorporated
• Original Assignee: Everspin Technologies Incorporated
• Inventors: Slaughter, Jon
• Primary Examiner(s): Auduong, Gene
• Application Number:
  US15/409,757
• Time in Patent Office: 502 Days
• Field of Search: 365158, 365148, 365170, 365171, 365207, 365163
• CPC Class Codes: G11C 11/00 Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor G11C14/00 - G11C21/00 take precedence
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1673 Reading or sensing circuits or methods
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: G11C 11/18 using Hall-effect devices
• CPC Class Codes: G11C 11/5607 using magnetic storage elements
• CPC Class Codes: G11C 13/0035 Evaluating degradation, retention or wearout, e.g. by counting writing cycles
• CPC Class Codes: G11C 13/004 Reading or sensing circuits or methods

Abstract

A magnetoresistive memory device that stores data in the reference portion of spin-torque memory cells provides for more robust data storage. In normal operation, the memory cells use the free portion of the memory cell for data storage. Techniques for storing data in the reference portions of memory cells are presented, along with techniques for recovering data stored in the reference portions of memory cells.

Claims

1. A method of operation of a magnetoresistive memory, wherein the magnetoresistive memory includes a plurality of non-volatile magnetoresistive memory cells, wherein each memory cell includes a reference portion and a free portion, wherein during normal operation, data is written into each memory cell by forcing a magnetic moment of the free portion into one of a parallel and an antiparallel orientation with respect to a magnetic moment of the reference portion, the method comprising:

forcing the free portion of a selected memory cell of the plurality of memory cells to a known state corresponding to a known orientation of the magnetic moment of the free portion;

after forcing the free portion of the selected memory cell to the known state, sampling a resistance through the selected memory cell;

comparing the resistance sampled with a reference to determine a data bit stored by the magnetic moment of the reference portion of the selected memory cell.

2. The method of claim 1, wherein forcing the free portion of the selected memory cell includes applying an external magnetic field to the memory, wherein the external magnetic field forces the free portion of each memory cell of the plurality of memory cells to the known state.

3. The method of claim 1, wherein comparing the resistance sampled with a reference further comprises comparing the resistance sampled with a reference for a midpoint read scheme.

4. The method of claim 3, wherein forcing the free portion of the selected memory cell includes applying an external magnetic field to the memory, wherein the external magnetic field forces the free portion of each memory cell of the plurality of memory cells to the known state.

5. The method of claim 1, wherein comparing the resistance sampled with a reference further comprises:

comparing the resistance sampled with a resistance corresponding to a memory cell having a known magnetic state.

6. The method of claim 5, wherein the memory cell having the known magnetic state has a free portion having a magnetic moment parallel to a magnetic moment of a reference portion of the memory cell having the known magnetic state.

7. The method of claim 5, wherein the memory cell having the known magnetic state has a free portion having a magnetic moment antiparallel to a magnetic moment of a reference portion of the memory cell having the known magnetic state.

8. A method of operation of a magnetoresistive memory, wherein the magnetoresistive memory includes a plurality of non-volatile magnetoresistive memory cells, wherein each memory cell includes a reference portion and a free portion, wherein during normal operation, data is written into each memory cell by forcing a magnetic moment of the free portion into one of a parallel and an antiparallel orientation with respect to a magnetic moment of the reference portion, the method comprising:

forcing the free portion of a selected memory cell of the plurality of memory cells to a known state corresponding to a known orientation of the magnetic moment of the free portion;

after forcing the free portion of the selected memory cell to the known state, determining whether the known orientation of the magnetic moment of the free portion of the selected memory cell is parallel or antiparallel to a magnetic moment of the reference portion of the selected memory cell; and

determining a data bit stored by the reference portion of the selected memory cell based on whether the magnetic moment of the reference portion is parallel or antiparallel to the known orientation of the magnetic moment of the free portion.

9. The method of claim 8, wherein forcing the free portion of the selected memory cell to the known state includes applying an external magnetic field to the memory, wherein the external magnetic field forces the free portion of each memory cell of the plurality of memory cells to the known state.

10. The method of claim 9, wherein forcing the free portion of the selected memory cell further includes applying the external magnetic field to the memory while the memory is exposed to elevated temperatures.

11. The method of claim 8, wherein determining whether the known orientation of the magnetic moment of the free portion of the selected memory cell is parallel or antiparallel to the magnetic moment of the reference portion of the selected memory cell includes:

sampling an initial resistance through the selected memory cell;

after sampling the initial resistance, applying a write current through the selected memory cell;

after applying the write current, sampling a resulting resistance through the selected memory cell; and

comparing the resulting resistance with the initial resistance to determine whether the known orientation of the magnetic moment of the free portion of the selected memory cell is parallel or antiparallel to the magnetic moment of the reference portion of the selected memory cell.

12. The method of claim 8, wherein determining whether the known orientation of the magnetic moment of the free portion of the selected memory cell is parallel or antiparallel to the magnetic moment of the reference portion of the selected memory cell uses a midpoint read scheme.

13. The method of claim 8, wherein the selected memory cell is included in a high-low pair of memory cells, and wherein determining whether the known orientation of the magnetic moment of the free portion of the selected memory cell is parallel or antiparallel to the magnetic moment of the reference portion of the selected memory cell includes comparing a resistance through the selected memory cell with a resistance of another memory cell included in the high-low pair of memory cells.

14. The method of claim 8, wherein determining whether the known orientation of the magnetic moment of the free portion of the selected memory cell is parallel or antiparallel to a magnetic moment of the reference portion of the selected memory cell includes comparing a resistance through the selected memory cell with a resistance of a memory cell having a free portion in the known state and a reference portion with a magnetic moment known to be either antiparallel or parallel to the known orientation of the free portion.

15. An apparatus, comprising:

a plurality of non-volatile magnetoresistive memory cells, wherein each memory cell includes a reference portion and a free portion, the plurality of memory cells including;

a first set of memory cells having a reference portion with a first magnetic state; and

a second set of memory cells having a reference portion with a second magnetic state, wherein the first magnetic state is different than the second magnetic state; and

control circuitry coupled to the plurality of memory cells, the control circuitry configured to read data stored in the reference portion of a selected memory cell of the plurality of memory cells, wherein the control circuitry is configured to;

determine whether the selected memory cell is included in the first set of memory cells or the second set of memory cells based an orientation of a magnetic moment of the reference portion of the selected memory cell in comparison to a known orientation of a magnetic moment of the free portion of the selected memory cell.

16. The apparatus of claim 15 further comprising a magnetic field generator that applies an external magnetic field to the plurality of non-volatile magnetoresistive memory cells in order to force the free portions of all of the non-volatile magnetoresistive memory cells into the known orientation.

17. The apparatus of claim 15, wherein each memory cell of the plurality of memory cells is a spin-torque magnetoresistive memory cell that includes an unpinned synthetic antiferromagnetic structure (SAF).

18. The apparatus of claim 15, wherein for each memory cell of the plurality of non-volatile magnetoresistive memory cells, the reference portion and the free portion are such that when an external magnetic field of a selected magnitude is applied to the memory cell:

the free portion is held in a known magnetization state corresponding to the external magnetic field; and

the reference portion of the memory cell;

i) is forced to a programmed state when a current having a non-destructive magnitude is applied through the memory cell; and

ii) remains unchanged when the current having a non-destructive magnitude is not applied.

19. The apparatus of claim 16, wherein the control circuitry is further configured to read data stored in the reference portion of the selected memory cell using a midpoint read scheme.

20. The apparatus of claim 16, wherein the control circuitry is further configured to read data stored in the reference portion of the selected memory cell using a self-referenced read.