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Semiconductor device and manufacturing method thereof

  • US 9,991,293 B2
  • Filed: 09/02/2014
  • Issued: 06/05/2018
  • Est. Priority Date: 11/25/2011
  • Status: Expired due to Fees
First Claim
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1. A method for manufacturing a semiconductor device, comprising the steps of:

  • forming a gate electrode, a first wiring and a capacitor wiring over a substrate by a first photolithography process;

    forming a gate insulating layer over the gate electrode;

    forming a first semiconductor layer including a first oxide semiconductor over the gate insulating layer;

    forming a source electrode, a drain electrode, and a second wiring over the first semiconductor layer by a second photolithography process;

    performing a cleaning treatment using a solution of diluted hydrofluoric acid after the step of forming the source electrode and the drain electrode so that at least a part of impurities attached to a surface of the first semiconductor layer is removed, wherein the solution of diluted hydrofluoric acid has a concentration of 0.5 wt % to 5×

    10-4 wt %;

    forming a second semiconductor layer including a second oxide semiconductor having a higher insulating property than the first semiconductor layer over the source electrode and the drain electrode after the step of performing the cleaning treatment;

    forming a contact hole by selectively removing a portion of the second semiconductor layer that overlaps with the drain electrode and forming a groove portion by removing a portion of the second semiconductor layer, the first semiconductor layer, and the gate insulating layer, by a third photolithography process; and

    forming a pixel electrode over the second semiconductor layer and an electrode over the drain electrode by a fourth photolithography process,wherein the first wiring is electrically connected to the gate electrode,wherein the second wiring is electrically connected to the source electrode, the pixel electrode, and the capacitor wiring, andwherein the electrode is in direct contact with a side surface of the first semiconductor layer and a side surface of the gate electrode.

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