Translating atomic read-modify-write accesses

• US 9,996,329 B2
• Filed: 02/16/2016
• Issued: 06/12/2018
• Est. Priority Date: 02/16/2016
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Inventors: Dang, Clarence, Barakat, Youssef, Kishan, Arun
• Primary Examiner(s): Vo, Ted T
• Application Number:
  US15/044,707
• Publication Number:
  US 20170235557A1
• Time in Patent Office: 847 Days
• Field of Search: 717136-137, 717153-154
• CPC Class Codes: G06F 8/52 Binary to binary
• CPC Class Codes: G06F 9/4552 Involving translation to a different instruction set architecture, e.g. just-in-time translation in a JVM

Abstract

Various systems and methods for translating atomic read-modify-write accesses are described herein. In one example, a method includes determining that a machine instruction of a first language specifies an atomic read-modify-write access. The method includes generating machine instructions of the second language to perform an atomic access for the address if the address is aligned. The method includes generating machine instructions of a second language to acquire a global lock if the address is unaligned. Additionally, the method includes generating machine instructions of the second language to perform a non-atomic access for the address if the address is unaligned. Also, the method includes generating machine instructions of the second language to release the global lock if the address is unaligned.

Claims

1. A system for translating atomic read-modify-write accesses, comprising:

a processor to;

determine that a machine instruction of a first language specifies an atomic read-modify-write access for an address;

generate machine instructions of a second language to perform an atomic access for the address if the address is aligned;

generate machine instructions of the second language to acquire a global lock if the address is unaligned;

generate machine instructions of the second language to perform a non-atomic access for the address if the address is unaligned; and

generate machine instructions of the second language to release the global lock if the address is unaligned.

2. The system of claim 1, wherein the address is an aligned address.

3. The system of claim 1, wherein the address is an unaligned address.

4. The system of claim 1, wherein the processor is to execute the generated machine instructions.

5. The system of claim 4, wherein executing the generated machine instructions comprises:

acquiring the global lock;

performing the non-atomic access; and

releasing the global lock.

6. The system of claim 4, wherein executing the generated machine instructions comprises:

performing the atomic access.

7. The system of claim 1, wherein the processor is to generate machine instructions of a second language to perform an alignment check of the address, wherein the first language is for a first processor, and wherein the second language is for a second processor.

8. The system of claim 1, wherein the processor is to determine whether the address is initially known or unknown.

9. The system of claim 1, wherein the machine instructions of the second language comprise native atomic read-modify-write instructions to handle a case where the address is aligned.

10. The system of claim 1, wherein the global lock synchronizes accesses within a process.

11. The system of claim 1, wherein the global lock synchronizes accesses between processes within a system.

12. The system of claim 11, wherein a security level of the processes indicates that data corresponding to the accesses is to be shared using the global lock or the data corresponding to the accesses is to be shared using a second global lock.

13. A method for translating atomic read-modify-write accesses, comprising:

determining, via a processor, that a machine instruction of a first language specifies an atomic read-modify-write access wherein the first language is for a first processor;

determining, via the processor, whether the address is aligned;

generating, via the processor, machine instructions of a second language to acquire a global lock if the address is unaligned, wherein the second language is for a second processor;

generating, via the processor, machine instructions of the second language to perform an atomic access for the address if the address is aligned;

generating, via the processor, machine instructions of the second language to perform a non-atomic access for the address if the address is unaligned; and

generating, via the processor, machine instructions of the second language to release the global lock if the address is unaligned.

14. The method of claim 13, wherein the address comprises an aligned address.

15. The method of claim 13, wherein the address comprises an unaligned address.

16. The method of claim 13, comprising executing the generated machine instructions.

17. The method of claim 16, wherein executing the generated machine instructions comprises:

acquiring the global lock;

performing the non-atomic access; and

releasing the global lock.

18. The method of claim 16, wherein executing the generated machine instructions comprises performing the atomic access.

19. The method of claim 13, comprising generating machine instructions of a second language to perform an alignment check of the address, wherein the first language is for a first processor, and wherein the second language is for a second processor.

20. The method of claim 13, comprising determining whether the address is initially known or unknown.

21. The method of claim 13, wherein the machine instructions of the second language comprise native atomic read-modify-write instructions to handle a case where the address is aligned.

22. One or more computer-readable storage devices for storing computer-readable instructions that, when executed by one or more processing devices, cause the one or more processing devices to:

determine that a machine instruction of a first language specifies an atomic read-modify-write access;

generate machine instructions of the second language to acquire a global lock if the address is unaligned;

generate machine instructions of the second language to perform an atomic access for the address if the address is aligned;

generate machine instructions of the second language to perform a non-atomic access for the address if the address is unaligned; and

generate machine instructions of the second language to release the global lock if the alignment check determines the address is unaligned.

23. The computer-readable storage devices of claim 22, wherein the address comprises an unaligned address.

24. The computer-readable storage devices of claim 22, wherein the instructions, when executed by one or more processing devices, cause the one or more processing devices to execute the generated machine instructions.

25. The computer-readable storage devices of claim 24, wherein executing the generated machine instructions comprises:

acquiring the global lock;

performing the non-atomic access; and

releasing the global lock.

26. The computer-readable storage device of claim 22, wherein the global lock synchronizes accesses within a process.

27. The computer-readable storage device of claim 22, wherein the global lock synchronizes accesses between processes within a system.

28. The computer-readable storage device of claim 27, wherein a security level of the processes indicates that data corresponding to the accesses is to be shared using the global lock or the data corresponding to the accesses is to be shared using a second global lock.