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EL display apparatus

DC
  • US 9,997,108 B1
  • Filed: 01/25/2018
  • Issued: 06/12/2018
  • Est. Priority Date: 09/07/2001
  • Status: Expired due to Term
First Claim
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1. An electroluminescent (EL) display apparatus, comprising:

  • a display screen including pixels arranged in a matrix, each of the pixels including an EL device and a pixel circuit;

    a source signal line through which an analog image signal output from a source driver circuit is transmitted; and

    a gate driver circuit which includes a first gate driver circuit and a second gate driver circuit, first gate signal lines through which selection voltages and non-selection voltages output from the first gate driver circuit are transmitted, and second gate signal lines through which selection voltages and non-selection voltages output from the second gate driver circuit are transmitted;

    wherein the pixel circuit of each of the pixels includes;

    a driving transistor to supply a current to the EL device;

    a first switch transistor provided on a current path through which the current flows from a power line through the driving transistor to the EL device;

    a second switch transistor to supply, to the driving transistor, the analog image signal supplied from the source signal line; and

    a third switch transistor for initially resetting the pixel circuit before the second switch transistor supplies, to the driving transistor, the analog image signal supplied from the source signal line,a gate terminal of the first switch transistor is connected to the first gate driver circuit,a gate terminal of the second switch transistor and a gate terminal of the third switch transistor are connected to the second gate driver circuit,the second gate driver circuit includes a second gate signal line connected to both the gate terminal of the second switch transistor of a Nth pixel row and the gate terminal of the third switch transistor of a (N+1)th pixel row for simultaneously connecting the gate terminal of the second switch transistor of the Nth pixel row and the gate terminal of the third switch transistor of the (N+1)th pixel row, andthe first switch transistor of the (N+1)th pixel row is controlled in an OFF state by the first gate driver circuit when the third switch transistor initially resets the pixel circuit.

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