Spad array with pixel-level bias control

• US 9,997,551 B2
• Filed: 12/20/2015
• Issued: 06/12/2018
• Est. Priority Date: 12/20/2015
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Mandai, Shingo, Agranov, Gennadiy A., Waldon, Matthew C.
• Primary Examiner(s): Ko, Tony
• Application Number:
  US14/975,790
• Publication Number:
  US 20170179173A1
• Time in Patent Office: 905 Days
• CPC Class Codes: G01S 17/894 3D imaging with simultaneous measurement of time-of-flight at a 2D array of receiver pixels, e.g. time-of-flight cameras or flash lidar
• CPC Class Codes: G01S 7/4863 Detector arrays, e.g. charge-transfer gates
• CPC Class Codes: G01S 7/497 Means for monitoring or calibrating
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14641 Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H01L 31/107 the potential barrier working in avalanche mode, e.g. avalanche photodiodes

Abstract

A sensing device includes an array of sensing elements. Each sensing element includes a photodiode, including a p-n junction, and a local biasing circuit, coupled to reverse-bias the p-n junction at a bias voltage greater than a breakdown voltage of the p-n junction by a margin sufficient so that a single photon incident on the p-n junction triggers an avalanche pulse output from the sensing element. A bias control circuit is coupled to set the bias voltage in different ones of the sensing elements to different, respective values that are greater than the breakdown voltage.

Claims

1. A sensing device, comprising:

a global bias generator, which is configured to generate a global bias voltage;

an array of sensing elements, each sensing element coupled to receive the global bias voltage and comprising;

a photodiode, comprising a p-n junction; and

a local biasing circuit, coupled in series with the photodiode and the global bias voltage and configured to apply an excess bias voltage across the p-n junction so as to reverse-bias the p-n junction at a total bias voltage that is a sum of the global bias voltage and the excess bias voltage and is greater than a breakdown voltage of the p-n junction by a margin sufficient so that a single photon incident on the p-n junction triggers an avalanche pulse output from the sensing element; and

a bias control circuit, which is coupled to set the excess bias voltage in different ones of the sensing elements to different, respective values.

2. The device according to claim 1, wherein each sensing element comprises a quenching circuit, and wherein the photodiode, the local biasing circuit and the quenching circuit in each sensing element are coupled together in series.

3. The device according to claim 1, wherein the local biasing circuit comprises a voltage adder, which is coupled to a plurality of voltage lines, providing respective input voltages, and is configured to select and sum the input voltages in order to set the excess bias voltage that is applied to the p-n junction.

4. The device according to claim 1, wherein the bias control circuit is configured to set the excess bias voltage in the different ones of the sensing elements so as to equalize a sensitivity of the sensing elements to incident photons.

5. The device according to claim 1, wherein the bias control circuit is configured to identify one or more of the sensing elements that have noise levels above a specified limit, and to set the excess bias voltage of the identified sensing elements so as to reduce the noise levels.

6. The device according to claim 1, wherein the bias control circuit is configured to increase the total bias voltage of the sensing elements in a selected region of the array so that the sensing elements in the selected region have a sensitivity to incident photons that is greater than the sensitivity of the sensing elements outside the specified region.

7. The device according to claim 6, wherein the bias control circuit is configured to modify the excess bias voltage of the sensing elements so as to sweep the selected region across the array.

8. The device according to claim 1, wherein the array of the sensing elements comprises a first two-dimensional matrix of the sensing elements formed on a first semiconductor chip, and wherein the bias control circuit comprises a second two-dimensional matrix of bias control elements formed on a second semiconductor chip and coupled to the first two-dimensional matrix in a one-to-one correspondence between the sensing elements and the bias control elements.

9. The device according to claim 8, wherein the second semiconductor chip comprises processing circuits coupled to receive respective output pulses from the sensing elements, wherein the processing circuits comprise a respective time-to-digital converter (TDC) coupled to each sensing element.

10. A method for sensing, comprising:

generating a global bias voltage;

providing an array of sensing elements, each sensing element coupled to receive the global bias voltage and comprising a photodiode, comprising a p-n junction, and a local biasing circuit, coupled in series with the photodiode and the global bias voltage and configured to apply an excess bias voltage across the p-n junction so as to reverse-bias the p-n junction at a total bias voltage that is a sum of the global bias voltage and the excess bias voltage and is greater than a breakdown voltage of the p-n junction by a margin sufficient so that a single photon incident on the p-n junction triggers an avalanche pulse output from the sensing element; and

setting the excess bias voltage in different ones of the sensing elements to different, respective values.

11. The method according to claim 10, wherein each sensing element comprises a quenching circuit, and wherein providing the array comprises coupling the photodiode, the local biasing circuit and the quenching circuit in each sensing element together in series.

12. The method according to claim 10, wherein the local biasing circuit comprises a voltage adder, which is coupled to a plurality of voltage lines, providing respective input voltages, and wherein setting the excess bias voltage comprises selecting and summing the input voltages in order to provide the excess bias voltage to the p-n junction.

13. The method according to claim 10, wherein the excess bias voltage in the different ones of the sensing elements is set so as to equalize a sensitivity of the sensing elements to incident photons.

14. The method according to claim 10, wherein setting the excess bias voltage comprises identifying one or more of the sensing elements that have noise levels above a specified limit, and setting the excess bias voltage of the identified sensing elements so as to reduce the noise levels.

15. The method according to claim 10, wherein setting the excess bias voltage comprises increasing the total bias voltage of the sensing elements in a selected region of the array so that the sensing elements in the selected region have a sensitivity to incident photons that is greater than the sensitivity of the sensing elements outside the specified region.

16. The method according to claim 15, wherein increasing the total bias voltage comprises modifying the excess bias voltage of the sensing elements so as to sweep the selected region across the array.

17. The method according to claim 10, wherein providing the array of the sensing elements comprises providing a first two-dimensional matrix of the sensing elements formed on a first semiconductor chip, and providing a second two-dimensional matrix of bias control elements formed on a second semiconductor chip and coupled to the first two-dimensional matrix in a one-to-one correspondence between the sensing elements and the bias control elements.

18. The method according to claim 17, wherein the second semiconductor chip comprises processing circuits coupled to receive respective output pulses from the sensing elements, wherein the processing circuits comprise a respective time-to-digital converter (TDC) coupled to each sensing element.