Semiconductor device and method for manufacturing the same

• US 9,997,639 B2
• Filed: 03/07/2016
• Issued: 06/12/2018
• Est. Priority Date: 10/24/2012
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koezuka, Junichi, Shima, Yukinori, Tokunaga, Hajime, Sasaki, Toshinari, Murayama, Keisuke, Matsubayashi, Daisuke
• Primary Examiner(s): Kim, Su C
• Application Number:
  US15/062,276
• Publication Number:
  US 20160190348A1
• Time in Patent Office: 827 Days
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02263 deposition from the gas or vapour phase
• CPC Class Codes: H01L 21/02554 Oxides
• CPC Class Codes: H01L 21/02565 Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 29/24 including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22 including organic materials H10K99/00
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 29/78693 the semiconducting oxide being amorphous
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

In a semiconductor device including a transistor including a gate electrode formed over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, a first oxide insulating film covering the transistor, and a second oxide insulating film formed over the first oxide insulating film, the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide semiconductor film has an amorphous structure or a microcrystalline structure, the first oxide insulating film is an oxide insulating film through which oxygen is permeated, and the second oxide insulating film is an oxide insulating film containing more oxygen than that in the stoichiometric composition.

Claims

1. A semiconductor device comprising a transistor, the transistor comprising:

a gate electrode over a substrate;

a gate insulating layer over the gate electrode;

a multilayer film over the gate insulating layer;

a pair of electrodes in electrical contact with the multilayer film;

a first oxide insulating layer over the multilayer film and the pair of electrodes; and

a nitride insulating layer over the first oxide insulating layer,

wherein the multilayer film includes an oxide semiconductor layer and an oxide layer over the oxide semiconductor layer,

wherein the oxide semiconductor layer has a crystalline structure,

wherein the first oxide insulating layer includes silicon,

wherein the nitride insulating layer includes silicon,

wherein the first oxide insulating layer is an oxide insulating layer containing more oxygen than that in the stoichiometric composition,

wherein each of the oxide semiconductor layer and the oxide layer includes In-M-Zn oxide,

wherein the M represents Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf, and

wherein a proportion of M atoms in the oxide layer is higher than a proportion of M atoms in the oxide semiconductor layer.

2. The semiconductor device according to claim 1, wherein the oxide semiconductor layer contains at least one of In and Ga.

3. The semiconductor device according to claim 1, wherein a conduction band bottom of the oxide layer is closer to a vacuum level than is a conduction band bottom of the oxide semiconductor layer.

4. The semiconductor device according to claim 3, wherein an energy difference between the conduction band bottom of the oxide layer and the conduction band bottom of the oxide semiconductor layer is greater than or equal to 0.05 eV and less than or equal to 2 eV.

5. The semiconductor device according to claim 1,

wherein a concentration of silicon in the oxide semiconductor layer is lower than 2×

10¹⁸ atoms/cm³, and

wherein a concentration of silicon at an interface between the oxide semiconductor layer and the oxide layer is lower than 2×

10¹⁸ atoms/cm³.

6. A display module comprising the semiconductor device according to claim 1.

7. An electronic device comprising the semiconductor device according to claim 1.

8. The semiconductor device according to claim 1, wherein the M represents Ga.

9. The semiconductor device according to claim 8,

wherein an atomic ratio of In:

Ga;

Zn in the oxide semiconductor layer is 1;

1;

1 or 3;

1;

2, and

wherein an atomic ratio of In;

Ga;

Zn in the oxide layer is 1;

3;

2, 1;

6;

4, or 1;

9;

6.

10. The semiconductor device according to claim 1, comprising a second oxide insulating layer between the multilayer film and the first oxide insulating layer.

11. A semiconductor device comprising a transistor, the transistor comprising:

a gate electrode over a substrate;

a gate insulating layer over the gate electrode;

a multilayer film over the gate insulating layer;

a pair of electrodes in electrical contact with the multilayer film;

a first oxide insulating layer over the multilayer film and the pair of electrodes;

a second oxide insulating layer over the first oxide insulating layer; and

a nitride insulating layer over the second oxide insulating layer,

a second gate electrode over the multilayer film,

wherein the multilayer film includes an oxide semiconductor layer and an oxide layer over the oxide semiconductor layer,

wherein the oxide semiconductor layer has a crystalline structure,

wherein the second oxide insulating layer includes silicon,

wherein the nitride insulating layer includes silicon,

wherein the first oxide insulating layer is an oxide insulating layer through which oxygen is permeated,

wherein the second oxide insulating layer is an oxide insulating layer containing more oxygen than that in the stoichiometric composition,

wherein each of the oxide semiconductor layer and the oxide layer includes In-M-Zn oxide,

wherein the M represents Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf, and

wherein a proportion of M atoms in the oxide layer is higher than a proportion of M atoms in the oxide semiconductor layer.

12. The semiconductor device according to claim 11, wherein the oxide semiconductor layer contains at least one of In and Ga.

13. The semiconductor device according to claim 11, wherein a conduction band bottom of the oxide layer is closer to a vacuum level than is a conduction band bottom of the oxide semiconductor layer.

14. The semiconductor device according to claim 13, wherein an energy difference between the conduction band bottom of the oxide layer and the conduction band bottom of the oxide semiconductor layer is greater than or equal to 0.05 eV and less than or equal to 2 eV.

15. The semiconductor device according to claim 11,

wherein a concentration of silicon in the oxide semiconductor layer is lower than 2×

10¹⁸ atoms/cm³, and

wherein a concentration of silicon in a vicinity of an interface between the oxide semiconductor layer and the oxide layer is lower than 2×

10¹⁸ atoms/cm³.

16. A display module comprising the semiconductor device according to claim 11.

17. An electronic device comprising the semiconductor device according to claim 11.

18. The semiconductor device according to claim 11, wherein an amount of a change of a threshold voltage in a negative direction or a positive direction by a bias-temperature stress test is less than or equal to 1.0 V.

19. The semiconductor device according to claim 11, wherein the M represents Ga.

20. The semiconductor device according to claim 19,

wherein an atomic ratio of In:

Ga;

Zn in the oxide semiconductor layer is 1;

1;

1 or 3;

1;

2, and

wherein an atomic ratio of In;

Ga;

Zn in the oxide layer is 1;

3;

2, 1;

6;

4, or 1;

9;

6.