Method of manufacturing a circuit device

• US 9,998,032 B2
• Filed: 09/12/2017
• Issued: 06/12/2018
• Est. Priority Date: 09/24/2010
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Mashimo, Shigeaki, Horiuchi, Fumio, Kudo, Kiyoaki, Sakurai, Akira, Inagaki, Yuhki
• Primary Examiner(s): Chen, Xiaoliang
• Application Number:
  US15/702,228
• Publication Number:
  US 20180006578A1
• Time in Patent Office: 273 Days
• Field of Search: 438107, 438 15, 438125, 257177, 257676, 257691, 361772, 363 2104, 29837
• CPC Class Codes: H01L 21/4825 Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
• CPC Class Codes: H01L 21/56 Encapsulations, e.g. encapsulation layers, coatings
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45014 Ribbon connectors, e.g. rectangular cross-section
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48096 the kinked part being in proximity to the bonding area on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/48106 the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48139 with an intermediate bond, e.g. continuous wire daisy chain
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49531 the additional leads being a wiring board
• CPC Class Codes: H01L 23/49541 Geometry of the lead-frame
• CPC Class Codes: H01L 23/49575 : Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/85 : using a wire connector wire bonding in general B23K20/004
• CPC Class Codes: H01L 25/072 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/18 : the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1203 : Rectifying Diode
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/206 : Length ranges
• CPC Class Codes: H01L 2924/20752 : larger or equal to 20 microns less than 30 microns
• CPC Class Codes: H01L 2924/20753 : larger or equal to 30 microns less than 40 microns
• CPC Class Codes: H01L 2924/20754 : larger or equal to 40 microns less than 50 microns
• CPC Class Codes: H01L 2924/20755 : larger or equal to 50 microns less than 60 microns
• CPC Class Codes: H01L 2924/20756 : larger or equal to 60 microns less than 70 microns
• CPC Class Codes: H01L 2924/20757 : larger or equal to 70 microns less than 80 microns
• CPC Class Codes: H01L 2924/20758 : larger or equal to 80 microns less than 90 microns
• CPC Class Codes: H01L 2924/20759 : larger or equal to 90 microns less than 100 microns
• CPC Class Codes: H01L 2924/2076 : equal to or larger than 100 microns
• CPC Class Codes: H02M 7/537 : using semiconductor devices only, e.g. single switched pulse inverters
• CPC Class Codes: H05K 1/0203 : Cooling of mounted components H05K1/0272 takes precedence
• CPC Class Codes: H05K 1/181 : associated with surface mounted components
• CPC Class Codes: Y10T 29/4916 : Simultaneous circuit manufacturing

Abstract

In one form, a method of manufacturing a circuit device comprises providing a lead frame comprising a plurality of leads, each comprising an island portion, a bonding portion elevated from the island portion, a slope portion extending obliquely so as to connect the island portion and the bonding portion, and a lead portion extending from the bonding portion. First and second transistors and first and second diodes are mounted upper surfaces of island portions of respective first and second leads, and are connected to the respective leads through wirings that connect the transistors and diodes to the bonding portions of the respective leads. Lower surfaces of the island portions are attached to an upper surface of a circuit board, and the circuit board, the transistors, the diodes, and the lead frame are encapsulated by a resin, so that the lead portions are not covered by the resin.

Claims

1. A method of manufacturing a circuit device, comprising:

providing a lead frame comprising a plurality of leads, each comprising an island portion, a bonding portion elevated from the island portion, a slope portion extending obliquely so as to connect the island portion and the bonding portion, and a lead portion extending from the bonding portion;

mounting a first transistor and a first diode of a first phase on an upper surface of the island portion of a first lead;

connecting the first transistor and the first diode of the first phase to a bonding portion of a second lead by a first wiring;

mounting a second transistor and a second diode of the first phase on the upper surface of the island portion of a third lead;

connecting the second transistor and the second diode of the first phase to a bonding portion of the second lead by a second wiring;

attaching lower surfaces of the island portion of each of the plurality of leads to an upper surface of a circuit board; and

encapsulating by a resin the circuit board, the first and second transistors, the first and second diodes and the lead frame so that the lead portion of each of the plurality of leads are not covered by the resin.

2. The method of claim 1, further comprising:

mounting a first transistor and a first diode of a second phase on an upper surface of the island portion of a fourth lead;

connecting the first transistor and the first diode of the second phase to the bonding portion of the first lead by a third wiring;

mounting a second transistor and a second diode of the second phase on the upper surface of the island portion of the third lead; and

connecting the second transistor and the second diode of the second phase to a bonding portion of the fourth lead by a fourth wiring.

3. The method of claim 2, further comprising:

attaching lower surfaces of the island portion of the fourth lead to the upper surface of the circuit board; and

encapsulating by the resin the circuit board, the first and second transistors and first and second diodes of each of the first and second phases, and the lead frame so that the lead portions of the first, second, third, and fourth leads are not covered by the resin.

4. The method of claim 2, further comprising:

mounting a first transistor and a first diode of a third phase on an upper surface of the island portion of a fifth lead;

connecting the first transistor and the first diode of the third phase to the bonding portion of the first lead by a fifth wiring;

mounting a second transistor and a second diode of the third phase on the upper surface of the island portion of the third lead; and

connecting the second transistor and the second diode of the third phase to a bonding portion of the fifth lead by a fourth wiring.

5. The method of claim 4, further comprising:

attaching lower surfaces of the island portion of the fourth and fifth leads to the upper surface of the circuit board; and

encapsulating by the resin the circuit board, the first and second transistors and first and second diodes of each of the first, second, and third phases, and the lead frame so that the lead portions of the first, second, third, fourth, and fifth leads are not covered by the resin.

6. The method of claim 5, further comprising:

mounting an insulative control board on the upper surface of the circuit board; and

mounting a control element on an upper surface of the insulative control board.

7. The method of claim 6, further comprising:

connecting the control element to the first and second transistors of each of the first, second, and third phases through respective wirings.

8. The method of claim 1, further comprising:

mounting an insulative control board on the upper surface of the circuit board; and

mounting a control element on an upper surface of the insulative control board.

9. The method of claim 8, further comprising:

connecting the control element to the first and second transistors of the first phase through respective wirings.

10. The method of claim 1, further comprising:

connecting a control electrode of the first transistor to a sixth lead of the plurality of leads; and

connecting a control electrode of the second transistor to a seventh lead of the plurality of leads.

11. The method of claim 1, wherein:

mounting the first transistor on the upper surface of the island portion of the first lead comprises mounting a first insulated gate bipolar transistor (IGBT) on the upper surface of the island portion of the first lead; and

mounting the second transistor on the upper surface of the island portion of the third lead comprises mounting a second IGBT on the upper surface of the island portion of the third lead.