Laser-assisted fabrication of bipolar transistors in silicon-on-sapphire (SOS)

• US H1,637 H
• Filed: 09/18/1991
• Issued: 03/04/1997
• Est. Priority Date: 09/18/1991
• Status: Abandoned Application

• Current Assignee: Bruce W. Offord, Kurt H. Weiner, Stephen D. Russell
• Original Assignee: Bruce W. Offord, Kurt H. Weiner, Stephen D. Russell
• Inventors: Offord, Bruce W., Russell, Stephen D., Weiner, Kurt H.
• Primary Examiner(s): Jordan, Charles T.
• Assistant Examiner(s): Hardee, J. R.
• Application Number:
  US77/625,38
• Time in Patent Office: 1,994 Days
• Field of Search: 148DIG11, 148DIG150, 148DIG92, 437173, 437174
• CPC Class Codes: H01L 21/26513 of electrically active species
• CPC Class Codes: H01L 21/2658 of a molecular ion, e.g. decaborane
• CPC Class Codes: H01L 21/268 using electromagnetic radiation, e.g. laser radiation
• CPC Class Codes: H01L 21/86 the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
• CPC Class Codes: H01L 29/66265 Thin film bipolar transistors H01L29/66242 takes precedence

Abstract

The fabrication of bipolar junction transistors in silicon-on-sapphire (SOS) relies upon the laser-assisted dopant activation in SOS. A patterned 100% aluminum mask whose function is to reflect laser light from regions where melting of the silicon is undesirable is provided on an SOS wafer to be processed. The wafer is placed within a wafer carrier that is evacuated and backfilled with an inert atmosphere and that is provided with a window transparent to the wavelength of the laser beam to allow illumination of the masked wafer when the carrier is inserted into a laser processing system. A pulsed laser (typically an excimer laser) beam is appropriately shaped and homogenized and one or more pulses are directed onto the wafer. The laser beam pulse energy and pulse duration are set to obtain the optimal fluence impinging on the wafer in order to achieve the desired melt duration and corresponding junction depth. Care must be taken since activation and rapid dopant redistribution occurs when the laser fluence is above the melt threshold and below the ablation threshold. Thus, bipolar junction transistors in SOS utilize a pulsed laser activation of ion implanted dopant atoms. Appropriate masking and pulsed laser illumination assures the electrical activation of the dopant without allowing undesirable diffusion either vertically along crystallographic defects (diffusion pipes) or laterally.

Claims

1. A method for laser-assisted dopant activation and rapid dopant redistribution while inhibiting the creation of undesirable diffusion in a silicon-on-sapphire wafer comprising:

placing said silicon-on-sapphire wafer in an appropriate ambient; and

generating an appropriately shaped and spatially homogenized laser beam having a pulse energy and pulse duration preset to above the melt threshold and below the ablation threshold of said silicon of said silicon-on-sappire wafer to obtain a predetermined optimal fluence in order to achieve a desired melt duration and corresponding junction depth; and

directing said appropriately shaped and homogenized laser beam of at least one pulse onto said silicon-on-sapphire wafer in a predetermined processing location thereon to ensure said dopant activation and said rapid dopant redistribution while said inhibiting the creation of undesirable diffusion in said silicon-on-sapphire wafer.

2. A method according to claim 1 further including:

providing a patterned mask on said silicon-on-sapphire wafer to reflect impinging emissions from regions on said silicon-on-sapphire wafer where melting of the silicon is undesirable to achieve said predetermined processing location.

3. A method according to claim 1 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth is defined therein.

4. A method according to claim 2 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth is defined therein.

5. A method according to claims 1, 2, 3 or 4 in which the step of said generating is with said pulse energy between 0.4 J/cm² and 2.5 J/cm² with said laser beam at a wavelength of 308 nm.

6. A method according to claim 5 in which the step of said generating is with said desired melt duration between 20 nsec and 120 nsec.

7. A method according to claim 2 further including:

the step of said providing of said patterned mask on said silicon-on sapphire wafer is a mask of predominantly composed of aluminum.

8. A method for laser-assisted dopant activation and rapid dopant redistribution to create a bipolar junction transistor on a silicon-on-sapphire wafer while inhibiting the creation of undesirable diffusion in the creation of said bipolar junction transistor comprising:

placing said silicon-on-sapphire wafer in an appropriate ambient; and

generating an appropriately shaped and spatially homogenized laser beam having a pulse energy and pulse duration preset to above the melt threshold and below the ablation threshold of said silicon of said silcon-on-sapphire wafer to obtain a predetermined optimal fluence in order to achieve a desired melt duration and corresponding junction depth; and

directing said appropriately shaped and homogenized laser beam of at least one pulse onto said silicon-on-sapphire wafer in a predetermined processing location thereon to ensure said dopant activation and said rapid dopant redistribution while said inhibiting the creation of undesirable diffusion in the creation of said bipolar junction transistor on said silicon-on-sapphire wafer.

9. A method according to claim 8 further including:

providing a patterned mask on said silicon-on-sapphire wafer to create said bipolar junction transistor by reflecting impinging emissions from regions on said silicon-on-sapphire wafer where melting of the silicon is undesirable to achieve said predetermined processing location.

10. A method according to claim 8 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth in said bipolar junction transistor is defined therein.

11. A method according to claim 9 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth in said bipolar junction transistor is defined therein.

12. A method according to claims 8, 9, 10 or 11 in which the step of said generating is with said pulse energy between 0.4 J/cm² and 2.5 J/cm² with said laser beam at a wavelength of 308 nm.

13. A method according to claim 12 in which the step of said generating is with said desired melt duration between 20 nsec and 120 nsec.

14. A method according to claim 9 further including:

the step of said providing of said patterned mask on said silicon-on sapphire wafer is a mask of predominantly composed of aluminum.

15. A method for in-situ laser-assisted dopant incorporation, dopant activation and rapid dopant redistribution while inhibiting the creation of undesirable diffusion in a silicon-on-sapphire wafer comprising:

placing said silicon-on-sapphire wafer in an appropriate doing ambient; and

generating an appropriately shaped and spatially homogenized laser beam having a pulse energy and pulse duration preset to above the melt threshold and below the ablation threshold of said silicon of said silicon-on-sapphire wafer to obtain a predetermined optimal fluence in order to achieve a desired melt duration and corresponding junction depth; and

directing said appropriately shaped and homogenized laser beam of at least one pulse onto said silicon-on-sapphire wafer in a predetermined processing location thereon to ensure said dopant incorporation, said dopant activation and said rapid dopant redistribution while said inhibiting the creation of undesirable diffusion in said silicon-on-sapphire wafer.

16. A method according to claim 15 further including:

providing a patterned mask on said silicon-on-sapphire wafer to reflect impinging emissions from regions on said silicon-on-sapphire wafer where melting of the silicon is undesirable to achieve said predetermined processing location.

17. A method according to claim 15 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth is defined therein.

18. A method according to claim 16 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth is defined therein.

19. A method according to claims 15, 16, 17 or 18 in which the step of said generating is with said pulse energy between 0.4 J/cm² and 2.5 J/cm² with said laser beam at a wavelength of 308 nm.

20. A method according to claim 19 in which the step of said generating is with said desired melt duration between 20 nsec and 120 nsec.

21. A method according to claim 16 further including:

the step of said providing of said patterned mask on said silicon-on sapphire wafer is a mask of predominantly composed of aluminum.

22. A method according to claim 15 in which said doping ambient is at a pressure of between 10^-4 torr to 2000 torr.

23. A method for laser-assisted dopant incorporation, dopant activation and rapid dopant redistribution to create a bipolar junction transistor while inhibiting the creation of undesirable diffusion in the creation of said bipolar junction transistor on a silicon-on-sapphire wafer while inhibiting the creation of undesirable diffusion in the creation of said bipolar junction transistor comprising:

placing said silicon-on-sapphire wafer in an appropriate doping ambient; and

generating an appropriately shaped and spatially homogenized laser beam having a pulse energy and pulse duration preset to above the melt threshold and below the ablation threshold of said silicon of said silicon-on-sapphire wafer to obtain a predetermined optimal fluence in order to achieve a desired melt duration and corresponding junction depth; and

directing said appropriately shaped and homogenized laser beam of at least one pulse onto said silicon-on-sapphire wafer in a predetermined processing location thereon to ensure said dopant incorporation, said dopant activation and said rapid dopant redistribution while said inhibiting the creation of undesirable diffusion in the creation of said bipolar junction transistor on said silicon-on-sapphire wafer.

24. A method according to claim 23 further including:

providing a patterned mask on said silicon-on-sapphire wafer to create said bipolar junction transistor by reflecting impinging emissions from regions on said silicon-on-sapphire wafer where melting of the silicon is undesirable to achieve said predetermined processing location.

25. A method according to claim 23 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth in said bipolar junction transistor is defined therein.

26. A method according to claim 24 in which the thickness of said silicon on said silicon-on-sapphire wafer is at least 1 micrometer and said corresponding junction depth in said bipolar junction transistor is defined therein.

27. A method according to claims 23, 24, 25 or 26 in which the step of said generating is with said pulse energy between 0.4 J/cm² and 2.5 J/cm² with said laser beam at a wavelength of 308 nm.

28. A method according to claim 27 in which the step of said generating is with said desired melt duration between 20 nsec and 120 nsec.

29. A method according to claim 24 further including:

the step of said providing of said patterned mask on said silicon-on sapphire wafer is a mask of predominantly composed of aluminum.

30. A method according to claim 23 in which the said doping ambient is at a pressure between 10^-4 torr to 2000 torr.