Synchronous disconnection and rearrangement

• US RE28,958 E
• Filed: 10/06/1975
• Issued: 09/07/1976
• Est. Priority Date: 05/30/1973
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Zafiropulo, Pietro Alois, Zihlmann, Franz Xaver
• Primary Examiner(s): Yusko, Donald J.
• Application Number:
  US05/619,997
• Time in Patent Office: 337 Days
• Field of Search: 340/147 R, 340/147 SC, 340/147 P, 178/69, 179/15 AL
• US Class Current: 375/356
• CPC Class Codes: H04L 12/437 Ring fault isolation or reconfiguration for SDH/SONET ring networks H04J3/085
• CPC Class Codes: H04Q 11/04 for time-division multiplexing H04Q11/0001 takes precedence

Abstract

This is a communication loop system having a bidirectional transmission capability between terminals. The system is comprised of switching units which allow isolation of a loop segment and the establishment of an operable folded loop for the remaining non-isolated loop portions of the system. In addition, the communication loop system comprises devices for enabling synchronous switchover operation during reconfiguration of the loop. This synchronous switchover insures that no data stream interruption or disturbance occurs for the units or terminals not attached to the disconnected loop segment.

Claims

1. A loop-structured communication system comprising:

a main loop and an auxiliary loop parallel to each other each capable of circulating data signals in one of two possible directions opposite to each other;

a plurality of switchover units each connected at various positions in said loops for subdividing said loops into a plurality of loop sections;

a loop controller connected to said loops for controlling the data flow circulating in said loops;

delay means present in each of said switchover units for synchronizing the data flow between said main loop and said auxiliary loop when one or more of said loop sections is disconnected from the remainder of said loops.

2. The system as defined in claim 1 wherein said switchover unit further comprises:

switch means for interconnecting said main loop to said auxiliary loop to permit data flow between said main loop and said auxiliary loop;

control means for controlling said switch means to effect a particular interconnection of said main loop with said auxiliary loop.

3. The system as defined in claim 2 wherein said switchover unit further comprises:

discriminator means for determining the time difference between the data stream circulating on said main loop and the data stream circulating on said auxiliary loop.

4. The system as defined in claim 3 wherein said delay means further comprises:

first and second delay means connected to said main loop and auxiliary loop respectively and to said discriminator means for selectively introducing a delay in either said main loop or said auxiliary loop so as to minimize the time difference between said data streams.

5. The system as defined in claim 4 wherein said control means further comprises:

means for detecting synchronization patterns transmitted by said loop controller and generating a pulse for each detection of a synchronization pattern;

counter means connected to said detection means for counting bit clock pulses between said pulses;

means connected to said counter means for determining whether a delay is to be imparted by said first or second delay means.