Microprocessor system having high order capability

• US RE30,671 E
• Filed: 07/09/1979
• Issued: 07/07/1981
• Est. Priority Date: 07/09/1979
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Poland, Sydney W.
• Primary Examiner(s): Smith, Jerry
• Application Number:
  US06/055,888
• Time in Patent Office: 729 Days
• Field of Search: 364/706, 364/200, 364/900
• US Class Current: 708/130
• CPC Class Codes: G06F 15/02 manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators
• CPC Class Codes: G06F 9/24 Loading of the microprogram

Abstract

A microprocessor system with high order capabilities is provided with the two non-volatile memories which are read-only-memories (ROMs) in the disclosed embodiment. A first ROM stores the microcode for controlling the operation of the microprocessor circuits. The second ROM, which is preferably disposed in a module or cartridge, stores a plurality of program codes which are used to address the first ROM. The second ROM'"'"'s module may be inserted into a receptacle for interconnecting it with the remainder of the microprocessor system. Preferably, a plurality of such second ROMs are available for selectively plugging into the microprocessor system.

Further, a particular embodiment of the microprocessor system with high order capabilities for use as an electronic calculator with high order capabilities is disclosed in great detail.

Claims

1. In an electronic microprocessor system, having a keyboard, output means for outputting data, a data memory for storing data, an arithmetic unit for performing arithmetic operations on the data stored in said data memory, and a first nonvolatile memory for storing groups of instruction words for controlling the arithmetic operations performed by said arithmetic unit, the combination which comprises:

(a) a second non-volatile memory for storing a plurality of sets of program codes, each program code being effective for addressing a preselected group of instruction words stored in first non-volatile memory, said second non-volatile memory being disposed in a module having a plurality of electrical contacts;

(b) a receptacle for temporarily interconnecting the contacts on said module with said microprocessor system;

(c) keyboard logic means for decoding inputs received at said keyboard;

(d) means for addressing said second non-volatile memory to read out preselected sets of program codes, said means for addressing said second memory including a counter responsive to selected instructions outputted from said first memory;

(e) means for addressing said first non-volatile memory in response to the program codes read out of said second non-volatile memory, said means for addressing said first memory including a first program counter selectively responsive to said keyboard logic means and said program codes outputted from said second memory.

2. The electronic microprocessor system according to claim 1, wherein said first and second non-volatile memory are first and second read-only-memories, respectively.

3. The electronic microprocessor system according to claim 1, further including means for loading said counter in said means for addressing said second read-only-memory with a multibit number stored in said data memory.

4. The electronic microprocessor system according to claim 3, wherein said data memory comprises a plurality of registers and a multibit register coupled to the output of said arithmetic unit.

5. The electronic microprocessor system according to claim 4, wherein said keyboard logic means includes a keyboard register, the contents of which are loaded into said first program counter in response to a particular instruction word outputted from said first read-only-memory and loaded into said counter addressing second read-only-memory in response to another instruction word outputted from said first read-only-memory.

6. The microprocessor system according to claim 5, further including means for loading said keyboard register means with the contents of said multibit register connected to the output of said arithmetic unit in response to a given instruction word outputted from said first read-only-memory, whereby said arithmetic unit, multibit register connected to the output thereof, keyboard register means, and means for loading said keyboard register means provides said means for loading said counter addressing said second read-only-memory with a multibit number stored in said data memory.

7. The electronic microprocessor system according to claim 6, further including random access memory means for storing a user defined program comprising of a selected sequence of key pushes at said keyboard, said selected sequence of key pushes being stored as a sequence of program codes therein and means for loading said program codes stored in said random access memory means into said first program counter.

8. The electronic microprocessor system according to claim 7, wherein said electronic microprocessor system is provided in a programmable calculator.

9. The electronic microprocessor system according to claim 1, further including random access memory means for storing a user defined program comprising of a selected sequence of key pushes at said keyboard, said selected sequence of key pushes being stored as a sequence of program codes therein and means for loading said program codes stored in said random access memory means into said first program counter.

10. The electronic microprocessor system according to claim 9, further including means for loading said counter in said means for addressing said second read-only-memory with a multibit number stored in said data memory.

11. The electronic microprocessor system according to claim 10, wherein said keyboard logic means includes keyboard register means for loading said first program counter in response to a particular instruction word outputted from said first read-only-memory and for loading said counter addressing second read-only-memory in response to another instruction word outputted from said first read-only-memory.

12. The electronic microprocessor system according to claim 10, wherein said keyboard logic means includes keyboard registers, the contents of which are loaded into said first program counter in response to a particular instruction word outputted from said first read-only-memory and loaded into said counter addressing second read-only-memory in response to another instruction word outputted from said first read-only-memory.

13. The electronic microprocessor system according to claim 1, wherein said keyboard logic means includes keyboard register, the contents of which are loaded into said first program counter in response to a particular instruction word outputted from said first read-only-memory and loaded into said counter addressing second read-only-memory in response to another instruction word outputted from said first read-only-memory.

14. The electronic microprocessor system according to claim 13, further including random access memory means for storing a user defined program comprising of a selected sequence of key pushes at said keyboard, said selected sequence of key pushes being stored as a sequence of program codes therein and means for loading said program codes stored in said random access memory means into said first program counter.

15. The electronic microprocessor system according to claim 1, wherein a plurality of said second non-volatile memories are provided in a plurality of modules, each one of said plurality of second-non-volatile memories storing different sequences of program codes, at least one of said modules including the second non-volatile memory disposed therein, being receivable in said receptacle at any given time.

16. The electronic microprocessor system according to claim 15, wherein said electronic microprocessor system is provided in a programmable calculator.

17. The programmable calculator according to claim 16, wherein said calculator includes a case in which said data memory, arithmetic unit receptacle and first non-volatile memory are disposed, said case having an opening adjacent to said receptacle for temporarily receiving at least a selected one of said modules.

18. The programmable calculator according to claim 17, wherein said first and second non-volatile memory are first and second read-only-memories, respectively.

19. The programmable calculator according to claim 17, further including a magnetic card reader for reading magnetic cards providing storage for programs including a plurality of program codes, a program memory for storing program codes read by said magnetic card reader, means for reading out of said program memory said program codes and means for addressing said first non-volatile memory in response to the program codes read out of said program memory.

20. The programmable calculator according to claim 19, wherein said input means includes a keyboard and wherein said calculator may be selectively placed in a learn mode or run mode at said keyboard and wherein said calculator further includes means for storing the program codes according to the keys depressed at said keyboard in said program memory when said calculator is in said learn mode.

21. An electronic microprocessor system, having input means for receiving data and for receiving input commands, said input means including a keyboard, output means for outputting data, a data memory for storing data received and data to be outputted, an arithmetic unit for performing arithmetic operations on data stored in said data memory, and a first non-volatile memory for storing groups of instruction words for controlling the arithmetic operations performed by said arithmetic unit, the combination which comprises:

(a) a second non-volatile memory for storing a plurality of sets of program codes, each program code being effective for addressing a preselected group of instruction words stored in said first non-volatile memory;

(b) keyboard logic means for decoding inputs received at said keyboard;

(c) means for addressing said second non-volatile memory to read-out preselected sets of program codes in response thereto, said means for addressing said second memory including a counter responsive to selected instructions outputted from said first memory;

(d) means for addressing said first non-volatile memory in response to the program codes read-out of said second non-volatile memory, said means for addressing said first memory including a first program counter selectively responsive to said keyboard logic and to said program codes outputted from said second memory;

(e) magnetic card reader means for receiving program codes stored on magnetic cards;

(f) program memory means for storing program codes received by said magnetic card reader means;

(g) means for addressing said first non-volatile memory in response to the program codes read-out of said program memory means; and

(h) wherein said means for addressing said first memory is further responsive to the program codes outputted from said program memory.

22. The system according to claim 21, wherein said first and second non-volatile memories are first and second read-only-memories respectively.

23. In an electronic microprocessor system of the type having a keyboard, an arithmetic unit for performing numerical operations on data, a first memory for storing a plurality of groups of instruction words, a first address register for addressing the first memory, keyboard logic means for inserting addresses into said first address register in response to key depressions at said keyboard and instruction word decoder means for controlling the arithmetic unit in response to instruction words outputted from the first memory, the combination which comprises:

(a) a second memory for storing a plurality of sets of program codes, each program code being effective for addressing a preselected group of instruction words stored in the first memory, the second memory being disposed in a module having a plurality of electrical contacts;

(b) a receptacle for temporarily interconnecting the contents on said module with said microprocessor system;

(c) a second address register for addressing the second memory;

(d) means for inserting a preselected address into said second address register in response to the depression of a "program" key at said keyboard;

(e) means for comparing the program code stored at said preselected address with a numerical value inputted at said keyboard after the depression of said "program" key; and

(f) means for displaying an error condition when the results of the comparison indicate that the numerical value inputted after the depression of the "program" key is greater than the numerical value of the program code stored at the preselected address.

24. The system as defined in claim 23, wherein said first and second memories are first and second read-only-memories.

25. An integrated circuit disposed in a module, the module being temporarily receivable in a receptacle of a calculator and the calculator including an instruction word memory for controlling the operations performed by the calculator, the integrated circuit comprising:

(a) a program memory for storing a plurality of program codes, each program code having two four-bit digits and being adapted for use by said calculator to address said instruction word memory;

(b) an address register for addressing the program memory;

(c) an instruction decoder responsive to bit serial instructions generated by said calculator;

(d) first means coupled to said program memory for outputting the four most significant bits of the addressed program code in serial to said calculator in response to said instruction decoder decoding a "FETCH HIGH" instruction from said calculator; and

(e) second means coupled to said program memory for outputting the four least significant bits of the addressed program code in serial to said calculator in response to said instruction decoder decoding a "FETCH" instruction from said calculator.

26. The system according to claim 25, further including means for incrementing the address in said address register in response to a decoded "FETCH" instruction.

27. The system according to claim 26, wherein said address register stores a four digit address and further including means for outputting to said calculator in serial the contents of a sequentially different digit position of said address register each time said instruction decoder decodes an "UNLOAD PC" instruction from said calculator. .Iadd. 28. A plug-in memory module for use in an electronic microprocessor system having a keyboard, logic means responsive to the keyboard for providing a predetermined one of a plurality of program codes in response to the selective actuation of the keyboard, a data memory for storing data, an instruction memory for storing groups of instructions in a non-volatile form, program counter means coupled to the logic means and to the instruction memory for addressing a predetermined one of the groups of instructions in response to each of the program codes, an arithmetic unit for performing arithmetic operations on the data stored in the data memory in response to the addressed instructions, output means for indicating the results of the arithmetic operations, and receptacle means including contacts for temporarily receiving the memory module and for coupling the memory module to the instruction memory and to the program counter means, the memory module comprising:

a memory module housing having contacts connectable to the contacts of said receptacle means;

a program memory disposed within said memory module housing for storing at least one sequence of stored program codes in a non-volatile form;

counter means disposed within said memory module housing and connectable to the instruction memory via said contacts, said counter means being connected to the program memory for addressing a predetermined one of said stored program codes in response to selected ones of the addressed instructions; and

means disposed within said memory module housing for providing said addressed stored program codes to the program counter means via said contacts, whereby the instruction memory is also addressable by the program counter means in response to said addressed stored program codes. .Iaddend. .Iadd. 29. A plug-in memory module for use in conjunction with a data processing system having a first memory means for storing a plurality of instruction codes and a first address generator for generating addresses of said instruction codes in said first memory means, said memory module comprising;

(a) A housing member;

(b) A plurality of electrical conductor means disposed at least partially within said housing member said conductor means for temporarily electrically coupling said plug-in module to said system;

(c) Second memory means disposed within said housing member and coupled to said conductor means, for storing a plurality of program codes and for providing said program codes to said system via said conductor means, each of said program codes being effective to cause said system to execute a plurality of said instruction codes; and

(d) Second address generator means disposed within said housing member, coupled to said second memory means and to said conductor means for selectively generating addresses of said program codes in said second memory means, said address generator means including counter means for

28. incrementing the address of said second memory means. .Iaddend..Iadd. 30. The plug-in memory module according to claim 29 wherein said address counter is responsive to signals received from said system via said conductor means for setting the address of said second memory means to a selected address. .Iaddend..Iadd. 31. The plug-in memory module according to claim 30 wherein said selected address is a branch address. .Iaddend..Iadd. 32. The plug-in memory module according to claim 29 wherein said counter means receives incrementing signals from said system via said conductor means and increments the address of said second memory means in response to said incrementing signals. .Iaddend..Iadd. 33. The plug-in memory module according to claim 29 wherein said second memory means is a nonvolatile memory means. .Iaddend..Iadd. 34. The plug-in memory module according to claim 33 wherein said nonvolatile memory is a read only memory means. .Iaddend..Iadd. 35. The plug-in memory module according to claim 29 wherein said first memory means is a nonvolatile memory means. .Iaddend..Iadd. 36. The plug-in memory module according to claim 35 wherein said nonvolatile memory is a read only memory. .Iaddend.