Variant key matrix cipher system
First Claim
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1. A variant key cryptographic system comprising:
- input means for introducing a plurality of electrical signals in binary form as message information to be enciphered or deciphered;
priming means for presenting a plurality of random binary signals to said input means to initialize the system prior to introducing message information thereto,matrix storage means for arranging a cipher key in an n×
m matrix array, wherein m and n are greater than 1;
a plurality of modulo-two adders interconnected with each other for adding selected elements from said matrix with binary signals obtained from said input means;
feedback means connected to said plurality of modulo-two adders;
non-affine transformation means connected to said feedback means for transforming the feedback signals present on the lines contained in said feedback means;
shift control means connected to said non-affine transformation means for rearranging selected matrix elements within said n×
m matrix array.
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Abstract
This is a cipher system for enciphering a stream of binary data by means of a product cipher. A clear message represented in a binary data format is transformed into a cipher message by operating on each bit of clear information with a complex modulo-two addition function. This function is dependent on previous internal cipher digits transmitted and varies for each message bit processed. The function is developed by continually shifting a key matrix under the control of a varying control matrix. The control matrix is formed from the sub-product of the complex function developed in generating each cipher bit.
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Citations
11 Claims
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1. A variant key cryptographic system comprising:
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input means for introducing a plurality of electrical signals in binary form as message information to be enciphered or deciphered; priming means for presenting a plurality of random binary signals to said input means to initialize the system prior to introducing message information thereto, matrix storage means for arranging a cipher key in an n×
m matrix array, wherein m and n are greater than 1;a plurality of modulo-two adders interconnected with each other for adding selected elements from said matrix with binary signals obtained from said input means; feedback means connected to said plurality of modulo-two adders; non-affine transformation means connected to said feedback means for transforming the feedback signals present on the lines contained in said feedback means; shift control means connected to said non-affine transformation means for rearranging selected matrix elements within said n×
m matrix array. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A variant key cryptographic system comprising:
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input means for introducing a plurality of electrical signals in binary form as message information to be enciphered or deciphered; priming means for presenting a plurality of pseudo-random binary signals to the input means to initialize the system prior to introducing message information thereto, matrix storage means for arranging a cipher key in an n×
m matrix array wherein m and n are greater than 1;a plurality of modulo-two adders interconnected with each other for adding selected elements from said matrix with binary signals obtained from said input means; feedback means connected to said plurality of modulo-two adders; first non-affine transformation means connected to said feedback means for transforming the feedback signals present on the lines contained in said feedback means; shift control means connected to said first non-affine transformation means for rearranging selected matrix elements within said n×
m matrix array;second feedback means connected to selected elements of said matrix for providing a binary word to a second non-affine transformation means; said second non-affine transformation means generating a variant binary vector that is stored in selected elements within the key matrix. - View Dependent Claims (9)
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10. A variant key cryptographic system comprising:
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means for introducing a plurality of electrical signals in binary form as message information to be enciphered or deciphered; priming means for presenting a plurality of random binary signals to said input means to initialize the system prior to introducing message information thereto, means for storing and rearranging a cipher key, a plurality of modulo-two adders interconnected with each other for adding selected elements from said storage means with binary signals obtained from said input means; feedback means connected to said plurality of modulo-two adders; non-affine transformation means connected to said feedback means for transforming the feedback signals present on the lines contained in said feedback means; control means connected to said non-affine transformation means for rearranging selected elements within said storage means. .Iaddend. .Iadd.
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11. A variant key cryptographic system comprising;
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input means for introducing a plurality of electrical signals in binary form as message information to be enciphered or deciphered; priming means for presenting a plurality of pseudo-random binary signals to the input means to initialize the system prior to introducing message information thereto, storage means for storing and rearranging a cipher key; a plurality of modulo-two adders interconnected with each other for adding selected elements from said storage means with binary signals obtained from said input means; feedback means connected to said plurality of modulo-two adders; first non-affine transformation means connected to said feedback means for transforming the feedback signals present on the lines contained in said feedback means; control means connected to said first non-affine transformation means for rearranging selected elements within said key storage means; second feedback means connected to selected elements of said storage means for providing a binary word to a second non-affine transformation means; said second non-affine transformation means generating a variant binary vector that is stored in selected elements within the key storage means. .Iaddend.
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Specification