Automatic control system for method and apparatus for checking devices of an automotive vehicle in use with a microcomputer

• US RE31,582 E
• Filed: 09/29/1982
• Issued: 05/08/1984
• Est. Priority Date: 03/23/1979
• Status: Expired due to Term

• Current Assignee: Nissan Motor Co., Ltd.
• Original Assignee: Nissan Motor Co., Ltd.
• Inventors: Hosaka, Akio, Higashiyama, Kazuhiro
• Primary Examiner(s): ATKINSON, CHARLES
• Application Number:
  US06/424,628
• Time in Patent Office: 587 Days
• Field of Search: 364/431.04, 364/424, 371/16, 371/20, 371/21, 123/417, 123/480
• US Class Current: 701/102
• CPC Class Codes: F02D 41/263 the program execution being modifiable by physical parameters
• CPC Class Codes: G11C 29/08 Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Abstract

An automatic control system for an automotive vehicle in use with a microcomputer has a checking system for checking an input unit, a ROM, a RAM and an output unit of the microcomputer. The checking system comprises a means which stores various checking programs to be executed for checking above-mentioned elements of the microcomputer. The checking system effectively operates to check the elements without causing expanding of duration of execution of the checking programs.

Claims

1. In a control system for an automotive vehicle for controlling various devices in response to sensor signals fed from sensors, said system having a microcomputer for receiving and processing said sensor signals and for controlling said devices, said microcomputer including an input unit, an output unit, a CPU, and a memory storage device including a ROM and a RAM, a method of controlling said vehicle and checking operation of said microcomputer comprising steps of:

(a) operating a control program in said microcomputer in response to said sensor signals for controlling said vehicle devices,

(b) determining in said CPU and in response to said sensor signals at least a first and a second engine condition,

(c) in response to said first determined engine condition, operating a first checking program for checking operation of said memory storage device, operation of said first checking program including the steps of;

(i) in said RAM, feeding into said RAM a first plurality of data signals corresponding to a first set a data values,

(ii) reading out of said RAM said fed-in data signals,

(iii) comparing each of said read out data signals with each of said first plurality of data signals and generating a first error signal upon non-equivalence of same,

(iv) providing an indication of said first error signal,

(v) in said ROM, reading a second plurality of data values from storage locations of said ROM,

(vi) comparing at least the least significant bits of the sum of said read data values with a reference sum and generating a second error signal upon non-equivalence thereof,

(vii) providing an indication of said second error signal,

(d) in response to said second determined engine condition, operating a second checking program for checking operation of at least one of said input and output units, said second checking .[.progrom.]. .Iadd.program .Iaddend.including the steps of;

(i) for said input unit, feeding into said input unit a third plurality of data signals corresponding to a third set of data values,

(ii) comparing in said CPU said third set of data values with one set of reference values stored in said memory storage device,

(iii) generating a third error signal if each of said third set of data values is not equal to each of said one set of reference values,

(iv) providing an indication of said third error signal,

(v) for said output unit, feeding a fourth plurality of data signals corresponding to a fourth set of data values from said memory device to said output unit,

(vi) comparing said fourth set of data values with another set of reference values,

(vii) generating a fourth error signal if each of said a fourth set of data values is not equal to each of said other set of reference values, and

(viii) providing an indication of said fourth error signal.

2. The method recited in claim 1 wherein said one set and another set are identical.

3. The method as recited in claim 2 further including the step of operating said second checking program for checking both said input and output units.

4. The method as recited in claim 3 further including the steps of feeding output signals from said output unit to said input unit for simultaneously checking operation of said input and output units by comparing, in said CPU, data fed to said output unit with data received by said input unit.

5. The method as recited in claim 1 wherein the second checking program in step (d) is preformed after execution of said first checking program in step (c).

6. The method recited in claim 1 wherein said vehicle has a starter switch and said first engine condition corresponds to the starter switch being ON, and said second engine condition corresponds to said starter switch being OFF.

7. The method as recited in claim 6 wherein said vehicle sensors include an idle speed sensor and an engine RPM sensor and said first checking program is divided into a first, RAM checking program, the operation thereof including steps (c)(i)-(c)(iv), and a second, ROM checking program, the operation thereof including steps (c)(v)-(c)(vii), said method further including the steps of:

(a) performing said RAM checking program in reponse to said idle switch being OFF and said engine RPM being above a predetermined value, and

(b) performing said ROM checking program in response to said idle switch being ON.

8. The method as recited in claim 1 wherein said steps of providing an indication of said first, second, third and fourth error signals include the steps of providing a visual indication of same.

9. The method as recited in claim 1 or 8 wherein a single indication is provided for said first, second, third and fourth error signals.