Video signal converting apparatus and display device having the same
First Claim
1. A liquid crystal display device for receiving horizontal and vertical synchronization signals and at least one analog video signal synchronized with said horizontal synchronization signal from a host and displays an image on a screen thereof said LCD device comprising:
- a display mode discriminating means for discriminating a display mode supported by said host in response to said horizontal and vertical synchronization signals to generate first and second mode signals and first, second, third and fourth data signals related to said discriminated display mode;
a clock generator for generating first and second pixel clock signals in synchronization with said horizontal synchronization signal, said first and second pixel clock signals having frequencies corresponding to said first and second data signals, respectively, a pulse number of said first pixel clock signal corresponding to one horizontal line being equal to a value of said first data signal and a pulse number of said second pixel clock signal corresponding to one horizontal line being equal to a value of said second data signal;
an analog-to-digital converter for converting said at least one analog video signal into a digital video signal in synchronization with said first pixel clock signal;
a memory for storing said digital video signal;
a horizontal output generator for receiving said third and fourth data signals in response to said vertical synchronization signal and generating a horizontal output signal, said digital video signal being read from said memory in synchronization with said horizontal output signal, a pixel number per one cycle of said horizontal output signal being equal to a value of said third data signal, and a pixel number per a pulse width of said horizontal output signal being equal to a value of said fourth data signal; and
a memory controller for enabling said digital video signal to be stored in said memory in accordance with said first and second mode signals, said horizontal synchronization signal and said first pixel clock signal, and enabling said digital video signal stored in said memory to be read from said memory in accordance with said second mode signal, said horizontal output signal and said second pixel clock signal.
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Abstract
Disclosed is a video signal converting apparatus and a display device having the same which may convert a low-resolution video signal from a host into a different-resolution video signal capable of being displayed on the entire screen of a high-resolution supporting display device. The apparatus has a detector for detecting a first resolution signal indicative of a resolution of the first display signal using horizontal and vertical synchronization signals related to the first display, a comparator for comparing the first resolution signal with a second resolution signal indicative of a reference resolution; and a converter for converting the first display signal into the second resolution signal, if there is a difference between the first and the second resolution signals.
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Citations
11 Claims
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1. A liquid crystal display device for receiving horizontal and vertical synchronization signals and at least one analog video signal synchronized with said horizontal synchronization signal from a host and displays an image on a screen thereof said LCD device comprising:
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a display mode discriminating means for discriminating a display mode supported by said host in response to said horizontal and vertical synchronization signals to generate first and second mode signals and first, second, third and fourth data signals related to said discriminated display mode;
a clock generator for generating first and second pixel clock signals in synchronization with said horizontal synchronization signal, said first and second pixel clock signals having frequencies corresponding to said first and second data signals, respectively, a pulse number of said first pixel clock signal corresponding to one horizontal line being equal to a value of said first data signal and a pulse number of said second pixel clock signal corresponding to one horizontal line being equal to a value of said second data signal;
an analog-to-digital converter for converting said at least one analog video signal into a digital video signal in synchronization with said first pixel clock signal;
a memory for storing said digital video signal;
a horizontal output generator for receiving said third and fourth data signals in response to said vertical synchronization signal and generating a horizontal output signal, said digital video signal being read from said memory in synchronization with said horizontal output signal, a pixel number per one cycle of said horizontal output signal being equal to a value of said third data signal, and a pixel number per a pulse width of said horizontal output signal being equal to a value of said fourth data signal; and
a memory controller for enabling said digital video signal to be stored in said memory in accordance with said first and second mode signals, said horizontal synchronization signal and said first pixel clock signal, and enabling said digital video signal stored in said memory to be read from said memory in accordance with said second mode signal, said horizontal output signal and said second pixel clock signal. - View Dependent Claims (2, 3, 4)
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5. A video signal converting apparatus which is provided to convert a first display signal of serial format into a second display signal of parallel format, said apparatus comprising:
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means for detecting a first resolution signal indicative of a resolution of said first display signal using horizontal and vertical synchronization signals related to said first display signal;
means for comparing said first resolution signal with a second resolution signal indicative of a reference resolution; and
means for converting said first display signal of serial format into said second display signal of parallel format, if there is a difference between said first and said second resolution signals.
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6. A display apparatus which receives horizontal and vertical synchronization signals, and a video signal of serial format synchronized with said horizontal synchronization signal from a host, and displays an image on a screen composed of a plurality of horizontal lines, each of said horizontal lines having a plurality of pixels, said display apparatus comprising:
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means for detecting the pixel number corresponding to said video signal from said host using said horizontal and vertical synchronization signals;
means for comparing the pixel number with a reference pixel number; and
means for sampling said video signal using a first frequency clock generated in accordance with a difference between the pixel number and the reference pixel number; and
means for displaying said sampled video signal on said screen in synchronization with a second frequency clock generated in accordance with said difference. - View Dependent Claims (7, 8, 9)
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10. A video signal converting method which is provided to convert a first display signal of serial format into a second display signal of parallel format, said method comprising:
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detecting a first resolution signal indicative of a resolution of said first display signal using horizontal and vertical synchronization signals related to said first display signal;
comparing said first resolution signal with a second resolution signal indicative of a reference resolution; and
converting said first display signal of serial format into said second display signal of parallel format, when said comparing step determines that there is a difference between said first and said second resolution signals.
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11. A liquid crystal display device for receiving horizontal and vertical synchronization signals and at least one analog video signal synchronized with said horizontal synchronization signal from a host and displaying an image on a screen thereof, said LCD device comprising:
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a display mode discriminating means for discriminating a display mode supported by said host in response to said horizontal and vertical synchronization signals to generate first and second mode signals and first, second, third and fourth data signals related to said discriminated display mode;
a clock generator for generating first and second pixel clock signals in synchronization with said horizontal synchronization signal, said first and second pixel clock signals having frequencies corresponding to said first and second data signals, respectively, a pulse number of said first pixel clock signal corresponding to one horizontal line being equal to a value of said first data signal and a pulse number of said second pixel clock signal corresponding to one horizontal line being equal to a value of said second data signal;
an analog-to-digital converter for converting said at least one analog video signal into a digital video signal in synchronization with said first pixel clock signal;
a horizontal output generator for receiving said third and fourth data signals in response to said vertical synchronization signal and generating a horizontal output signal, a pixel number per one cycle of said horizontal output signal being equal to a value of said third data signal, and a pixel number per a pulse width of said horizontal output signal being equal to a value of said fourth data signal; and
a memory controller for enabling said digital video signal to be stored in accordance with said first and second mode signals, said horizontal synchronization signal and said first pixel clock signal, and enabling said stored digital video signal to be read in accordance with said second mode signal, said horizontal output signal and said second pixel clock signal;
wherein a frame rate at which said image is displayed is the same as a frame rate of said received vertical synchronization signal.
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Specification