Extended cardbus/PC card controller with split-bridge technology
First Claim
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1. An interface comprising:
- first electronics adapted to interface parallel data from a parallel data bus to a first bus; and
second electronics adapted configured to interface said parallel data from said parallel data bus into serial data adapted and configured to interface with a second remote bus, said second electronics configured to converting said parallel data into said serial data and, without inserting bus wait states, send said serial data to said second remote bus without requiring any external signal from said second remote bus.
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Abstract
An improved extended cardbus/PC card controller (20) incorporating proprietary Split-Bridge™ high speed serial communication technology for interconnecting a conventional parallel system bus via a high speed serial link with a remote peripheral device. The extend cardbus/PC card controller is adapted to interface the parallel system bus, which may be PCI, PCMCIA, integrated, or some other parallel I/O bus architecture, with peripheral devices via PC cards, and now optionally via a high speed serial link using the proprietary serial Split-Bridge™ technology. The serial Split-Bridge™ technology provides real time interconnection between the parallel system bus and the remote device which may also be based on a parallel system data bus architecture, over a serial link, which serial link appears to be transparent between the buses and thus facilitates high speed data transfer exceeding data rates of 1.0 GigaHertz.
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Citations
36 Claims
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1. An interface comprising:
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first electronics adapted to interface parallel data from a parallel data bus to a first bus; and
second electronics adapted configured to interface said parallel data from said parallel data bus into serial data adapted and configured to interface with a second remote bus, said second electronics configured to converting said parallel data into said serial data and, without inserting bus wait states, send said serial data to said second remote bus without requiring any external signal from said second remote bus. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of interfacing parallel data on a parallel system bus to a first bus and a second remote bus, comprising the steps of:
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a) converting a first portion of the parallel data on the parallel system bus to parallel data adapted to communicate with said first bus; and
b) converting a second portion of the parallel data on the parallel system bus to high-speed serial data, which said serial data is sent, without inserting bus wait states, to the second remote bus without requiring or receiving a signal from said second remote bus before sending said serial data. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. An interface comprising:
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first electronics adapted to interface parallel data from a parallel data bus to a first bus; and
second electronics configured to interface said parallel data from said parallel data bus into serial data and configured to interface with a second remote bus, said second electronics configured to convert said parallel data into said serial data and, without additional bus wait states, send said serial data to said second remote bus, said second electronics configured to add tag data indicative of a transaction type to the serial data. - View Dependent Claims (17, 18, 19, 20, 21, 22)
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23. A method of interfacing parallel data on a parallel system bus to a first bus and a second remote bus, comprising:
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a) converting a first portion of the parallel data on the parallel system bus to parallel data adapted to communicate with said first bus; and
b) converting a second portion of the parallel data on the parallel system bus to high-speed serial data, which said serial data is sent, without requiring bus wait states, to the second remote bus, said serial data including a tag indicative of a transaction type. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30)
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31. An interface, comprising:
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first electronics configured to interface parallel data from a parallel data bus to a first bus; and
second electronics configured to interface said parallel data from said parallel data bus into serial data and configured to interface with a second remote bus, said second electronics configured to add tag data indicative of a transaction type to the serial data. - View Dependent Claims (32, 33, 34, 35, 36)
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Specification
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Current AssigneeShamrock Innovations, LLC
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Original AssigneeCharles Mollo, Doss Jeff, Frank W. Ahern
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InventorsMollo, Charles, Jeff, Doss, Ahern, Frank W.
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Primary Examiner(s)AUVE, GLENN ALLEN
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Application NumberUS11/183,298Time in Patent Office1,852 DaysField of Search710/315, 710/300, 710/305, 710/306, 710/7, 710/310, 710/311, 370/402, 370/413, 370/458, 375/221, 375/316, 380/37, 326/30, 712/35US Class Current710/300CPC Class CodesG06F 13/4022 using switching circuits, e...G06F 13/4045 where the bus bridge perfor...
