Dual-addressed rectifier storage device
First Claim
1. A digital logic device comprising one or more electronic information storage means, and addressing means for accessing said storage means, wherein each said electronic information storage means comprises:
- a plurality of generally parallel conductive means;
a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means;
a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means with each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection;
means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means to a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased;
means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; and
wherein said addressing means comprises;
means for controlling said means for electronically selecting conductive means of one said plurality of generally parallel conductive means and for electronically selecting conductive means of the other said plurality of generally parallel conductive means.
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Accused Products
Abstract
A read-only data storage and retrieval device is presented having no moving parts and requiring very low power. Addressing can be accomplished sequentially where the address increments automatically or can be accomplished randomly. High density storage is achieved through the use of a highly symmetric diode matrix that is addressed in both coordinate directions; its symmetry makes the Dual-addressed Rectifier Storage (DRS) Array very scaleable, particularly when made as an integrated circuit. For even greater storage flexibility, multiple digital rectifier storage arrays can be incorporated into the device, one or more of which can be made removable and interchangeable.
132 Citations
52 Claims
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1. A digital logic device comprising one or more electronic information storage means, and addressing means for accessing said storage means, wherein each said electronic information storage means comprises:
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a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means with each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means to a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; and wherein said addressing means comprises; means for controlling said means for electronically selecting conductive means of one said plurality of generally parallel conductive means and for electronically selecting conductive means of the other said plurality of generally parallel conductive means. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. An electronic information storage device comprising:
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a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. An electronic information storage device comprising a plurality of storage means where each storage means comprises:
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a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; where at least one of said plurality of generally parallel conductive means is common to more than one said storage means. - View Dependent Claims (26)
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27. A semiconductor information storage device comprising:
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a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means where one of said two pluralities of generally parallel conductive means is generally a surface layer of the semiconductor; and a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection, and where any said presence or absence of a rectifying conductive means is determined by the leaving in place or the removal, respectively, of a portion of the surface layer conductive means.
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28. An electronic array of selectable points comprising:
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a plurality of conductive means; a second plurality of conductive means; a plurality of selectable points where a point of said plurality of selectable points is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of conductive means and each conductive means of the second said plurality of conductive means; means for selecting a conductive means of one plurality of conductive means, and means for biasing the conductive means of the other plurality of conductive means such that each said selectable point present between a conductive means of said biased plurality of conductive means and a conductive means of the other said plurality of conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of conductive means by shifting the voltage of those biased conductive means that are to be disabled. - View Dependent Claims (29, 30)
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31. An information-storage circuit, the circuit comprising:
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a plurality of row storage lines; a plurality of column storage lines overlapping the plurality of row storage lines; a plurality of storage locations, wherein each storage location is disposed proximate to a point of intersection between a row storage line and a column storage line; a plurality of nonlinear storage elements, wherein each nonlinear storage element is disposed at a storage location; a plurality of row decoder lines electrically connected to the plurality of row storage lines; a plurality of column decoder lines electrically connected to the plurality of column storage lines; a plurality of nonlinear row address elements connected to the plurality of row decoder lines; a plurality of nonlinear column address elements connected to the plurality of column decoder lines; a plurality of row address lines connected to the plurality of nonlinear row address elements, wherein a number of the row address lines is less than a number of the row decoder lines; a plurality of column address lines connected to the plurality of nonlinear column address elements, wherein a number of the column address lines is less than a number of the column decoder lines; wherein a row address applied to the plurality of row address lines causes the plurality of nonlinear row address elements to select a row decoder line, the selected row decoder line selects a row storage line to which it is connected, a column address applied to the plurality of column address lines causes the plurality of nonlinear column address elements to select a column decoder line, the selected column decoder line selects a column storage line to which it is connected, and the intersection between the selected row storage line and the selected column storage line comprises the storage location defined by the row address and the column address. - View Dependent Claims (32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52)
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Specification