Semiconductor memory apparatus and method for writing data into the flash memory device

• US RE42,648 E1
• Filed: 08/25/2003
• Issued: 08/23/2011
• Est. Priority Date: 08/29/2002
• Status: Expired due to Fees

• Current Assignee: Godo Kaisha IP Bridge 1 (IP Bridge, Inc.)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Honda, Toshiyuki, Inagaki, Yoshihisa
• Primary Examiner(s): Ellis; Kevin L
• Assistant Examiner(s): BRADLEY, MATTHEW A
• Application Number:
  US12/016,751
• Time in Patent Office: 2,920 Days
• Field of Search: 711/103, 711/170, 365/185.01
• US Class Current: 711/103
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks

Abstract

A source block (B0) and the logical page number (“8”) of a write target page are identified from the logical address of the write target page. Data objects (DN8, DN9, . . . , DN12) to be written, which a host stores in a page buffer (2), are written into the data areas (DA) of the pages (Q0, Q1, . . . , Q4) of a destination block (Bn), starting from the top page (Q0) in sequence. The logical page number (“8”) of the write target page is written into the redundant area (RA) of the top page (Q0). The physical page number (“6=8−2”) of the write target page is identified, based on the logical page number (“8”) of the write target page and the page offset (“2”) of the source block (B0). When notified by the host of the end of the sending of the data objects (DN8, . . . , DN12), the data items (D13, . . . , D31, D0, D1, . . . , D7) in the source block (B0) are transferred to the pages (Q5, Q6, . . . , Q31) in the destination block (Bn) via the page buffer (2) sequentially and cyclically, starting from the page (P11) situated cyclically behind the write target page (P6) by the number (“5”) of pages of the data objects (DN8, . . . , DN12).

Claims

1. A semiconductor memory apparatus comprising:

(A) a flash memory device comprising more than one block, each of which includes more than one page, and a page-offset storage area in which a page offset of each of said blocks is stored, and configured to write data into a blank block front its top page in sequence;

(B) a page buffer in which the substantially same amount of data as the data storage capacity of one of said pages is temporarily stored;

(C) an address conversion section for receiving from a host a logical address that specifies a write target page, and converting the logical address into a pair of a physical address of a source block to which said write target page belongs, and a logical page number of said write target page; and

(D) a memory control section for

(a) reading the physical address of said source block and the logical page number of said write target page,

(b) selecting the blank block as a destination block,

(c) determining a page offset of said destination block based on the logical page number of said write target page, and writing the page offset into said page-offset storage area as the page offset of said destination block,

(d) reading a page offset of said source block from said page-offset storage area,

(e) obtaining a phys cal page number of said write target page based on the page offset of said source block and the logical page number of said write target page,

(f) writing a data object to be written, which is transferred from said host to said page buffer, into said destination block from its top page in sequence,

(g) obtaining a physical page number of a transfer start page of said source block based on the number of pages of said data objects and the physical page number of said write target page, and

(h) transferring data stored in said source block, from said transfer start page in a sequential and cyclic manner, via said page buffer, to a page next to or after a page area of said destination block into which said data object is written.

2. A semiconductor memory apparatus according to claim 1, wherein:

(A) said semiconductor memory apparatus further comprising;

(a) a host interface for receiving the logical address of said write target page and said data object, which are sent out from said host; and

(b) an address-conversion-table storage section storing a logical/physical address conversion table showing a correspondence between a logical address and a physical address for each of said blocks in said flash memory device, and a flag for showing whether or not each of said blocks is said blank block; and

(B) said memory control section counts the number of pages of said page area, and starts data transmission from said source block to said destination block in one of the case when the number of the pages reaches a predetermined number and the case when said host provides notification of the end of sending of said data object.

3. A semiconductor memory apparatus comprising:

(A) a flash memory device comprising more than one block, each of which includes more than one page, and configured to write data into a blank block from its top page in sequence;

(B) a page-offset storage section for storing a page offset of each of said blocks;

(C) a page buffer in which the substantially same amount of data as the data storage capacity of one of said pages is temporarily stored;

(D) an address conversion section for receiving from a host a logical address that specifies a write target page, and converting the logical address into a pair of a physical address of a source block and a logical page number of said write target page; and

(E) a memory control section for

(a) reading the physical address of said source block and the logical page number of said write target page,

(b) selecting the blank block as a destination block,

(c) determining a page offset of said destination block based on the logical page number of said write target page, and writing the page offset into said page-offset storage section as the page offset of said destination block,

(d) reading a page offset of said source block from said page-offset storage section,

(e) obtaining a physical page number of said write target page based on the page offset of said source block and the logical page number of said write target page,

(f) writing a data object to be written, which is transferred from said host to said page buffer, into said destination block from its top page in sequence,

(g) obtaining a physical page number of a transfer start page of said source block based on the number of pages of said data objects and the physical page number of said write target page, and

(h) transferring data stored in said source block, from said transfer start page in a sequential and cyclic manner, via said page buffer, to a page next to or after a page area of said destination block into which said data object is written.

4. A semiconductor memory apparatus according to claim 3, wherein:

(A) said semiconductor memory apparatus further comprising;

(a) a host interface for receiving the logical address of said write target page and said data object, which are sent out from said host; and

(b) an address-conversion-table storage section storing a logical/physical address conversion table showing a correspondence between a logical address and a physical address for each of said blocks in said flash memory device, and a flag for showing whether or not each of said blocks is said blank block; and

(B) said memory control section counts the number of pages of said page area, and starts data transmission from said source block to said destination block in one of the case when the number of the pages reaches a predetermined number and the case when said host provides notification of the end of sending of said data object.

5. A method of writing data into a flash memory device, which is the method of writing data into a flash memory device comprising more than one block, each of which includes more than one page, and writing data into a blank block from its top page in sequence;

the method comprising the steps of;

(A) receiving from a host a logical address specifying a write target page;

(B) converting said logical address into a pair of a physical address of a source block and a logical page number of said write target page;

(C) selecting the blank block as a destination block;

(D) determining a page offset of said destination block based on the logical page number of said write target page, and writing the page offset into a page-offset storage area in said lash memory device as a page offset of said destination block;

(E) reading a page offset of said source block from said page-offset storage area;

(F) determining a physical page number of said write target page based on the page offset of said source block and the logical page number of said write target page;

(G) writing a data object to be written, which is transferred from said host to a page buffer, into said destination block from its top page in sequence; and

(H) obtaining a physical page number of a transfer start page of said source block based on the number of pages of said data objects and the physical page number of said write target page, and transferring data stored in said source block, from said transfer start page in a sequential and cyclic manner, via said page buffer, to a page next to or after a page area of said destination block into which said data object is written.

6. A method of writing data into a flash memory device according to claim 5, further comprising the step of counting the number of pages of said page area, and starting data transmission from said source block to said destination block in one of the case when the number of the pages reaches a predetermined number and the case when said host provides notification of the end of sending of said data object.

7. A method of writing data into a flash memory device, which is the method of writing data into a flash memory device comprising more than one block, each of which includes more than one page, and writing data into a blank block from its top page in sequence;

the method comprising the steps of;

(A) receiving from a host a logical address specifying a write target page;

(B) converting said logical address into a pair of a physical address of a source block and a logical page number of said write target page;

(C) selecting the blank block as a destination block;

(D) determining a page offset of said destination block based on the logical page number of said write target page, and writing the page offset into a page-offset storage section as a page offset of said destination block;

(E) reading a page offset of said source block from said page-offset storage section;

(F) determining a physical page number of said write target page based on the page offset of said source block and the logical page number of said write target page;

(G) writing a data object to be written, which is transferred from said host to a page buffer, into said destination block from its top page in sequence; and

(H) obtaining a physical page number of a transfer start page of said source block based on the number of pages of said data objects and the physical page number of said write target page, and transferring data stored in said source block, from said transfer start page in a sequential and cyclic manner, via said page buffer, to a page next to or after a page area of said destination block into which said data object is written.

8. A method of writing data into a flash memory device according to claim 7, further comprising the step of counting the number of pages of said page area, and starting data transmission from said source block to said destination block in one of the case when the number of the pages reaches a predetermined number and the case when said host provides notification of the end of sending of said data object.

9. A semiconductor memory apparatus comprising:

a flash memory containing a plurality of blocks, each block including more than one page and being configured for data to be written into the block from a top page of the block in sequence;

a page buffer for storing data which is received from a host device and which is to be written into the flash memory;

an address converter for receiving, from the host device, a logical address that specifies a write target page, and converting the logical address into a physical address of a source block to which the write target page belongs and a logical page number of the write target page, the source block being one of the plurality of blocks; and

a memory controller for;

reading the physical address of the source block and the logical page number of the write target page;

selecting a destination block from the plurality of blocks;

writing the data stored in the page buffer into the destination block from a top page of the destination block in sequence; and

writing data stored in the source block to a page next to or after a page area of the destination block,

wherein the memory controller writes, in a top page of the destination block, a page offset which is calculated from the logical page number and a physical page number of the write target page.

10. An information system comprising:

a host device for transmitting information;

a semiconductor memory device for receiving and storing the information transmitted from the host device;

the semiconductor memory device comprising;

a flash memory containing a plurality of blocks, each block including more than one page and being configured for data to be written into the block from a top page of the block in sequence;

a page buffer for storing data which is received from the host device and which is to be written into the flash memory;

an address converter for receiving, from the host device, a logical address that specifies a write target page, and converting the logical address into a physical address of a source block to which the write target page belongs and a logical page number of the write target page, the source block being one of the plurality of blocks; and

a memory controller for;

reading the physical address of the source block and the logical page number of the write target page;

selecting a destination block from the plurality of blocks;

writing the data stored in the page buffer into the destination block from a top page of the destination block in sequence; and

writing data stored in the source block to a page next to or after a page area of the destination block;

wherein the memory controller writes, in a top page of the destination block, a page offset which is calculated from the logical page number and a physical page number of the write target page.

11. A controller comprising:

for writing data stored in a page buffer into a flash memory containing a plurality of blocks, each block including more than one page and being configured for data to be written into the block from a top page of the block in sequence, said controller comprising;

a memory controller for;

reading a physical address of a source block to which a write target page belongs and a logical page number of the write target page, the source block being one of the plurality of blocks contained on the flash memory;

selecting a destination block from the plurality of blocks contained on the flash memory;

writing data stored in the page buffer into the destination block from a top page of the destination block in sequence; and

writing data stored in the source block to a page next to or after a page area of the destination block,

wherein the memory controller writes, in a top page of the destination block, a page offset which is calculated from the logical page number and a physical page number of the write target page.