Apparatus and methods for determining overlay of structures having rotational or mirror symmetry

• US RE45,245 E1
• Filed: 05/01/2013
• Issued: 11/18/2014
• Est. Priority Date: 08/30/2000
• Status: Expired due to Fees

• Current Assignee: KLA-Tencor Corporation (KLA Corporation)
• Original Assignee: KLA-Tencor Corporation (KLA Corporation)
• Inventors: Ghinovker, Mark
• Primary Examiner(s): STARK, JARRETT J
• Application Number:
  US13/875,160
• Time in Patent Office: 566 Days
• Field of Search: 257/48, 257/797, 257/E23.179
• US Class Current: 257/48
• CPC Class Codes: G01B 11/272 using photoelectric detection means
• CPC Class Codes: G01N 21/4785 Standardising light scatter apparatus; Standards therefor
• CPC Class Codes: G01N 21/9501 Semiconductor wafers manufacturing processes per se of semiconductor devices implementing a measuring step H01L22/10
• CPC Class Codes: G03F 7/70633 Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
• CPC Class Codes: H01L 21/68 for positioning, orientation or alignment
• CPC Class Codes: H01L 21/682 Mask-wafer alignment in general G03F7/70, G03F9/70
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: Y10S 438/975 Substrate or mask aligning feature

Abstract

Disclosed are overlay targets having flexible symmetry characteristics and metrology techniques for measuring the overlay error between two or more successive layers of such targets. Techniques for imaging targets with flexible symmetry characteristics and analyzing the acquired images to determine overlay or alignment error are disclosed.

Claims

1. A semiconductor target for determining a relative shift between two or more successive layers of a substrate, the target comprising:

a plurality of first structures formed in a first layer, and the first structures having a first center of symmetry (COS), the first structures being aperiodic; and

a plurality of second structures formed in a second layer, and the second structures having a second COS, the second structures being aperiodic,

wherein the difference between the first COS and the second COS corresponds to an overlay error between the first and second layer and wherein the first and second structures have a 180°

rotational symmetry, without having a 90°

rotational symmetry, with respect to the first and second COS, respectively.

2. The target of claim 1, wherein the first and second structures are in the form of device structures.

3. The target of claim 1, wherein the first structures include a first set of sub-structures that each has a first shape and a second set of sub-structures that each has a second shape that differs from the first shape.

4. The target of claim 3, wherein the second structures include a third set of sub-structures that each has a third shape and a fourth set of sub-structures that each has a fourth shape that differs from the third shape.

5. The target of claim 4, wherein the first, second, third, and fourth shapes differ from each other.

6. The target of claim 1, wherein the first and second structures are image-based overlay targets.

7. The target of claim 1, wherein a difference between the first COS and the second COS that is greater than a known offset between the first and second COS corresponds to an overlay error between the first and second layer.

8. The target of claim 1, further comprising an opaque layer deposited over the first or second structures.

9. The target of claim 1, wherein the first or second layer is a dummy layer.

10. A wafer having the target of claim 1 and a plurality of dies, wherein the target is formed in a scribe line located between at least some of the dies.

11. A wafer having the target of claim 1 and a plurality of dies, wherein the target is formed within a one of the dies.