Semiconductor device and DC-DC converter

• US RE46,204 E1
• Filed: 03/31/2015
• Issued: 11/15/2016
• Est. Priority Date: 03/28/2008
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kawaguchi, Yusuke, Akiyama, Miwako, Yamaguchi, Yoshihiro, Sato, Nobuyuki, Hayase, Shigeaki
• Primary Examiner(s): MENEFEE, JAMES A
• Application Number:
  US14/675,258
• Time in Patent Office: 595 Days
• US Class Current: 1/1
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/66666 Vertical transistors H01L29/66712, H01L29/66742 take precedence
• CPC Class Codes: H01L 29/7803 structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H02M 3/1588 comprising at least one synchronous rectifier element H02M3/1582, H02M3/1584 take precedence
• CPC Class Codes: Y02B 70/1466 in non-galvanically isolated DC/DC converters

Abstract

A semiconductor device includes: a semiconductor substrate of a first conductivity type; a semiconductor region provided in the semiconductor substrate; a first trench formed in the semiconductor region; a second trench formed in the semiconductor substrate; a trench gate electrode provided in the first trench; and a trench source electrode provided in the second trench. The trench source electrode is shaped like a stripe and connected to the source electrode through its longitudinal portion.

Claims

1. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a semiconductor layer of a second conductivity type provided in part of an upper portion of the semiconductor substrate;

a semiconductor region of the first conductivity type provided in part of an upper portion of the semiconductor layer;

a first trench formed from an upper surface side of the semiconductor region, penetrating through the semiconductor region and the semiconductor layer, and reaching the semiconductor substrate;

a second trench formed in the semiconductor substrate and outside the semiconductor layer from an upper surface side of the semiconductor substrate;

a gate dielectric film formed on an inner surface of the first trench;

a trench gate electrode provided on the gate dielectric film;

a capacitive dielectric film formed on an inner surface of the second trench;

a trench source electrode provided on the capacitive dielectric film;

a dielectric film that overlaps an upper surface of a portion of the semiconductor substrate in which the second trench is formed;

a drain electrode provided on a lower surface of the semiconductor substrate; and

a source electrode provided on an upper surface of the semiconductor layer,

the trench source electrode extending in a direction parallel to the upper surface of the semiconductor substrate and being connected to the source electrode through a portion of the trench source electrode extending in the parallel direction, wherein end portions of the trench source electrode in the parallel direction are connected to the source electrode.

2. The device according to claim 1, wherein as viewed in a direction perpendicular to the upper surface of the semiconductor substrate, the trench source electrode is shaped like a stripe extending in the parallel direction.

3. The device according to claim 1, wherein the semiconductor substrate includes:

a low-resistance layer of the first conductivity type; and

a high-resistance layer of the first conductivity type formed on the low-resistance layer and having a higher resistivity than the low-resistance layer, and

the semiconductor layer of the second conductivity type is formed in part of an upper portion of the high-resistance layer.

4. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a semiconductor layer of a second conductivity type provided in part of an upper portion of the semiconductor substrate;

a semiconductor region of the first conductivity type provided in part of an upper portion of the semiconductor layer;

a first trench formed from an upper surface side of the semiconductor region, penetrating through the semiconductor region and the semiconductor layer, and reaching the semiconductor substrate;

a second trench formed in the semiconductor substrate and outside the semiconductor layer from an upper surface side of the semiconductor substrate;

a gate dielectric film formed on an inner surface of the first trench;

a trench gate electrode provided on the gate dielectric film;

a capacitive dielectric film formed on an inner surface of the second trench;

a trench source electrode provided on the capacitive dielectric film;

a dielectric film that overlaps an upper surface of a portion of the semiconductor substrate in which the second trench is formed;

a drain electrode provided on a lower surface of the semiconductor substrate; and

a source electrode provided on an upper surface of the semiconductor layer,

the trench source electrode extending in a direction parallel to the upper surface of the semiconductor substrate and being connected to the source electrode through a portion of the trench source electrode extending in the parallel direction, wherein end portions in the parallel direction and one or more intermediate portions of the trench source electrode are connected to the source electrode.

5. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a semiconductor layer of a second conductivity type provided in part of an upper portion of the semiconductor substrate;

a semiconductor region of the first conductivity type provided in part of an upper portion of the semiconductor layer;

a first trench formed from an upper surface side of the semiconductor region, penetrating through the semiconductor region and the semiconductor layer, and reaching the semiconductor substrate;

a second trench formed in the semiconductor substrate and outside the semiconductor layer from an upper surface side of the semiconductor substrate;

a gate dielectric film formed on an inner surface of the first trench;

a trench gate electrode provided on the gate dielectric film;

a capacitive dielectric film formed on an inner surface of the second trench;

a trench source electrode provided on the capacitive dielectric film;

a dielectric film that overlaps an upper surface of a portion of the semiconductor substrate in which the second trench is formed;

a drain electrode provided on a lower surface of the semiconductor substrate; and

a source electrode provided on an upper surface of the semiconductor layer,

the trench source electrode extending in a direction parallel to the upper surface of the semiconductor substrate and being connected to the source electrode through a portion of the trench source electrode extending in the parallel direction, wherein the upper surface of the portion of the semiconductor substrate that is between the second trench and a third trench, that is formed in the semiconductor substrate and outside the semiconductor layer, is not in contact with the source electrode.

6. A semiconductor device comprising:

a semiconductor substrate of a first conductivity type;

a semiconductor layer of a second conductivity type provided in part of an upper portion of the semiconductor substrate;

a semiconductor region of the first conductivity type provided in part of an upper portion of the semiconductor layer;

a plurality of gate electrodes provided adjacent to the semiconductor layer via gate dielectric films;

a plurality of trenches formed in the semiconductor substrate and outside the semiconductor layer from an upper surface side of the semiconductor substrate, the trenches extending in a direction parallel to the upper surface of the semiconductor substrate;

capacitive dielectric films formed on inner surfaces of the trenches;

trench source electrodes provided in the trenches on the capacitive dielectric films;

two source contacts provided on end portions of the trench source electrodes extending in the direction parallel to the upper surface of the semiconductor substrate;

a dielectric film provided on part of the semiconductor layer; and

a source electrode provided on the upper surface of the semiconductor region, wherein

the trench source electrodes are connected to the source electrode through the source contacts.

7. The device according to claim 6, wherein the semiconductor region contacts the source electrode in a region of the upper surface of the semiconductor region at which the dielectric films are not provided.

8. The device according to claim 6, wherein the source electrode is disposed on the trench source electrodes and the capacitive dielectric films.

9. The device of claim 6, wherein the semiconductor substrate comprises a first portion and a second portion overlying the first portion, and the resistivity of the first and second portions is different.

10. The device of claim 9, wherein the plurality of trenches extend inwardly of, and terminate within, the second portion.

11. The device of claim 9, wherein a portion of the second portion extends between one of the trenches and the first portion.

12. The device of claim 6, wherein one of the two source contacts has a rectangular strip shape extending in a direction crossing the direction parallel to upper surface of the semiconductor substrate.